Patent classifications
H01L2224/85075
Bonding wire for semiconductor device
The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for memories, the bonding wire including a core material containing one or more of Ga, In, and Sn for a total of 0.1 to 3.0 at % with a balance being made up of Ag and incidental impurities; and a coating layer formed over a surface of the core material, containing one or more of Pd and Pt, or Ag and one or more of Pd and Pt, with a balance being made up of incidental impurities, wherein the coating layer is 0.005 to 0.070 m in thickness.
Bonding wire for semiconductor device
The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for memories, the bonding wire including a core material containing one or more of Ga, In, and Sn for a total of 0.1 to 3.0 at % with a balance being made up of Ag and incidental impurities; and a coating layer formed over a surface of the core material, containing one or more of Pd and Pt, or Ag and one or more of Pd and Pt, with a balance being made up of incidental impurities, wherein the coating layer is 0.005 to 0.070 m in thickness.
Cu alloy bonding wire for semiconductor device
The present invention provides a Cu alloy bonding wire for a semiconductor device, where the bonding wire can satisfy requirements of high-density LSI applications. In the Cu alloy bonding wire for a semiconductor device, the abundance ratio of a crystal orientation <110> having an angular difference of 15 degrees or less from a direction perpendicular to one plane including a wire center axis to crystal orientations on a wire surface is 25% or more and 70% or less in average area percentage.
Cu alloy bonding wire for semiconductor device
The present invention provides a Cu alloy bonding wire for a semiconductor device, where the bonding wire can satisfy requirements of high-density LSI applications. In the Cu alloy bonding wire for a semiconductor device, the abundance ratio of a crystal orientation <110> having an angular difference of 15 degrees or less from a direction perpendicular to one plane including a wire center axis to crystal orientations on a wire surface is 25% or more and 70% or less in average area percentage.
SEMICONDUCTOR PACKAGE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor package including a metal base, a side wall, and at least one metal lead is disclosed. The metal base has a main surface to mount at least one semiconductor element. The side wall has a frame shape and is disposed on the main surface. The side wall includes a first side wall portion made of a resin and a second side wall portion made of a resin. The second side wall portion is placed on the first side wall portion and joined to the first side wall portion with an adhesive. The metal lead is partially sandwiched between the first side wall portion and the second side wall portion. A first end of the metal lead is exposed inside of the side wall, and a second end of the metal lead is located outside of the side wall.
Bonding wire for semiconductor device
A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:
Strength ratio=ultimate strength/0.2% offset yield strength.(1)
Bonding wire for semiconductor device
A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:
Strength ratio=ultimate strength/0.2% offset yield strength.(1)
Cu alloy core bonding wire with Pd coating for semiconductor device
A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface thereof, and the boding wire contains one or more elements of As, Te, Sn, Sb, Bi and Se in a total amount of 0.1 to 100 ppm by mass. The bonding longevity of a ball bonded part can increase in a high-temperature and high-humidity environment, improving the bonding reliability. When the Cu alloy core material further contains one or more of Ni, Zn, Rh, In, Ir, Pt, Ga and Ge in an amount, for each, of 0.011 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 170 C. or more. When an alloy skin layer containing Au and Pd is further formed on a surface of the Pd coating layer, wedge bondability improves.
Cu alloy core bonding wire with Pd coating for semiconductor device
A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface thereof, and the boding wire contains one or more elements of As, Te, Sn, Sb, Bi and Se in a total amount of 0.1 to 100 ppm by mass. The bonding longevity of a ball bonded part can increase in a high-temperature and high-humidity environment, improving the bonding reliability. When the Cu alloy core material further contains one or more of Ni, Zn, Rh, In, Ir, Pt, Ga and Ge in an amount, for each, of 0.011 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 170 C. or more. When an alloy skin layer containing Au and Pd is further formed on a surface of the Pd coating layer, wedge bondability improves.
Cu ALLOY BONDING WIRE FOR SEMICONDUCTOR DEVICE
The present invention provides a Cu alloy bonding wire for a semiconductor device, where the bonding wire can satisfy requirements of high-density LSI applications. In the Cu alloy bonding wire for a semiconductor device, the abundance ratio of a crystal orientation <110> having an angular difference of 15 degrees or less from a direction perpendicular to one plane including a wire center axis to crystal orientations on a wire surface is 25% or more and 70% or less in average area percentage.