Patent classifications
H01L2224/854
Semiconductor device and method
A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.
Semiconductor device and method
A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.
Methods for stud bump formation
An apparatus includes a spool configured to supply a wire, a cutting device configured to form a notch in the wire, and a capillary configured to bond the wire and to form a stud bump. The apparatus is further configured to pull the wire to break at the notch, with a tail region attached to the stud bump.
Methods for stud bump formation
An apparatus includes a spool configured to supply a wire, a cutting device configured to form a notch in the wire, and a capillary configured to bond the wire and to form a stud bump. The apparatus is further configured to pull the wire to break at the notch, with a tail region attached to the stud bump.
Semiconductor package
A semiconductor package includes a printed circuit board, a resistor circuit, and first and second semiconductor chips. First and second pads are on a first surface of the printed circuit board, and external connection terminal is on a second surface of the printed circuit board. The resistor circuit has a first connection terminal connected to the first pad and a second connection terminal connected to the second pad. The first semiconductor chip is connected to the first pad and the second semiconductor chip is stacked on the first semiconductor chip and connected to the second pad. The printed circuit board includes a signal transfer line connecting a branch in the printed circuit board to the external connection terminal. A first transfer line connects the branch to the first pad. A second transfer line connects the branch to the second pad.
Semiconductor package
A semiconductor package includes a printed circuit board, a resistor circuit, and first and second semiconductor chips. First and second pads are on a first surface of the printed circuit board, and external connection terminal is on a second surface of the printed circuit board. The resistor circuit has a first connection terminal connected to the first pad and a second connection terminal connected to the second pad. The first semiconductor chip is connected to the first pad and the second semiconductor chip is stacked on the first semiconductor chip and connected to the second pad. The printed circuit board includes a signal transfer line connecting a branch in the printed circuit board to the external connection terminal. A first transfer line connects the branch to the first pad. A second transfer line connects the branch to the second pad.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
It is possible to prevent deterioration of a redistribution layer due to exposure of the redistribution layer from an upper insulating film and the resultant reaction with moisture, ions, or the like. As means thereof, in a semiconductor device having a plurality of wiring layers formed in an element formation region and having a redistribution layer connected with a pad electrode which is an uppermost wiring layer, a dummy pattern is arranged in a region closer to a scribe region than the redistribution layer.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
It is possible to prevent deterioration of a redistribution layer due to exposure of the redistribution layer from an upper insulating film and the resultant reaction with moisture, ions, or the like. As means thereof, in a semiconductor device having a plurality of wiring layers formed in an element formation region and having a redistribution layer connected with a pad electrode which is an uppermost wiring layer, a dummy pattern is arranged in a region closer to a scribe region than the redistribution layer.
Semiconductor device having a protective material with a first pH formed around cooper wire bonds and aluminum pads for neutralizes a second pH of an outer encapsulant material
A semiconductor device includes a plurality of wire bonds formed on a surface of the semiconductor device by bonding each of a plurality of copper wires onto corresponding ones of a plurality of aluminum pads; a protective material is applied around the plurality of wire bonds, the protective material having a first pH; and at least a portion of the semiconductor device and the protective material are encapsulated with an encapsulating material having a second pH, wherein the first pH of the protective material is for neutralizing the second pH of the encapsulating material around the plurality of wire bonds.
Semiconductor device having a protective material with a first pH formed around cooper wire bonds and aluminum pads for neutralizes a second pH of an outer encapsulant material
A semiconductor device includes a plurality of wire bonds formed on a surface of the semiconductor device by bonding each of a plurality of copper wires onto corresponding ones of a plurality of aluminum pads; a protective material is applied around the plurality of wire bonds, the protective material having a first pH; and at least a portion of the semiconductor device and the protective material are encapsulated with an encapsulating material having a second pH, wherein the first pH of the protective material is for neutralizing the second pH of the encapsulating material around the plurality of wire bonds.