A method of forming semiconductor structure includes attaching backsides of top dies to a front side of a bottom wafer, the bottom wafer comprising a plurality of bottom dies; forming first conductive pillars on the front side of the bottom wafer adjacent to the top dies; forming a first dielectric material on the front side of the bottom wafer around the top dies and around the first conductive pillars; and dicing the bottom wafer to form a plurality of structures, each of the plurality of structures comprising at least one of the top dies and at least one of the bottom dies.

A semiconductor package includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes a substrate having a first via hole, an insulation interlayer formed on the substrate and having a first bonding pad in an outer surface thereof and a second via hole connected to the first via hole and exposing the first bonding pad, and a plug structure formed within the first and second via holes to be connected to the first bonding pad. The second semiconductor chip includes a second bonding pad bonded to the plug structure which is exposed from a surface of the substrate of the first semiconductor chip.

A semiconductor package includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes a substrate having a first via hole, an insulation interlayer formed on the substrate and having a first bonding pad in an outer surface thereof and a second via hole connected to the first via hole and exposing the first bonding pad, and a plug structure formed within the first and second via holes to be connected to the first bonding pad. The second semiconductor chip includes a second bonding pad bonded to the plug structure which is exposed from a surface of the substrate of the first semiconductor chip.

A semiconductor device assembly that includes a second side of an interposer being connected to a first side of a substrate. A plurality of interconnects may be connected to a second side of the substrate. First and second semiconductor devices are connected directly to the first side of the interposer. The interposer is configured to enable the first semiconductor device and the second semiconductor device to communicate with each other through the interposer. The interposer may be a silicon interposer that includes complementary metal-oxide-semiconductor circuits. The first semiconductor device may be a processing unit and the second semiconductor device may be a memory device, which may be a high bandwidth memory device. A method of making a semiconductor device assembly includes attaching both a memory device and a processing unit directly to a first side of an interposer and connecting a second side of the interposer to a substrate.

A semiconductor device assembly that includes a second side of an interposer being connected to a first side of a substrate. A plurality of interconnects may be connected to a second side of the substrate. First and second semiconductor devices are connected directly to the first side of the interposer. The interposer is configured to enable the first semiconductor device and the second semiconductor device to communicate with each other through the interposer. The interposer may be a silicon interposer that includes complementary metal-oxide-semiconductor circuits. The first semiconductor device may be a processing unit and the second semiconductor device may be a memory device, which may be a high bandwidth memory device. A method of making a semiconductor device assembly includes attaching both a memory device and a processing unit directly to a first side of an interposer and connecting a second side of the interposer to a substrate.

A method of forming a package and a package are provided. The method includes placing a main die and a dummy die side by side on a carrier substrate. The method also includes forming a molding material along sidewalls of the main die and the dummy die. The method also includes forming a redistribution layer comprising a plurality of vias and conductive lines over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die. The method also includes removing the carrier substrate.

A method of forming a package and a package are provided. The method includes placing a main die and a dummy die side by side on a carrier substrate. The method also includes forming a molding material along sidewalls of the main die and the dummy die. The method also includes forming a redistribution layer comprising a plurality of vias and conductive lines over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die. The method also includes removing the carrier substrate.

Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.

Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.

A semiconductor structure includes a substrate including a first surface and a second surface opposite to the first surface; a dielectric layer disposed over the second surface or below the first surface; a polymeric layer disposed over or below the dielectric layer; an isolation layer surrounding and contacted with the substrate, the dielectric layer and the polymeric layer; a die disposed over the polymeric layer; a first conductive bump disposed below the first surface of the substrate; and a second conductive bump disposed between the second surface of the substrate and the die.