Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.

Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.

Reduced-profile semiconductor device apparatus are achieved by thinning a semiconductive device substrate at a backside surface to expose a through-silicon via pillar, forming a recess to further expose the through-silicon via pillar, and by seating an electrical bump in the recess to contact both the through-silicon via pillar and the recess. In an embodiment, the electrical bump contacts a semiconductor package substrate to form a low-profile semiconductor device apparatus. In an embodiment, the electrical bump contacts a subsequent die to form a low-profile semiconductor device apparatus.

Reduced-profile semiconductor device apparatus are achieved by thinning a semiconductive device substrate at a backside surface to expose a through-silicon via pillar, forming a recess to further expose the through-silicon via pillar, and by seating an electrical bump in the recess to contact both the through-silicon via pillar and the recess. In an embodiment, the electrical bump contacts a semiconductor package substrate to form a low-profile semiconductor device apparatus. In an embodiment, the electrical bump contacts a subsequent die to form a low-profile semiconductor device apparatus.

A solid-state storage device includes a housing, a wiring board and a semiconductor package unit. The housing is formed with a heat-dissipating recess thereon. The wiring board is fixed in the housing. One side of the semiconductor package unit is mounted on the wiring board, and the other side of the semiconductor package unit is embedded in the heat-dissipating recess. A top surface and lateral surfaces surrounding the top surface of the semiconductor package unit are all thermally connected to the housing in the heat-dissipating recess.

A solid-state storage device includes a housing, a wiring board and a semiconductor package unit. The housing is formed with a heat-dissipating recess thereon. The wiring board is fixed in the housing. One side of the semiconductor package unit is mounted on the wiring board, and the other side of the semiconductor package unit is embedded in the heat-dissipating recess. A top surface and lateral surfaces surrounding the top surface of the semiconductor package unit are all thermally connected to the housing in the heat-dissipating recess.

A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.

A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.

A package structure includes a semiconductor package, a thermal conductive gel, a thermal conductive film and a heat spreader. The thermal conductive gel is disposed over the semiconductor package. The thermal conductive film is disposed over the semiconductor package and the thermal conductive gel. A thermal conductivity of the thermal conductive film is different from a thermal conductivity of the thermal conductive gel. The thermal conductive film is surrounded by the heat spreader.

A package structure includes a semiconductor package, a thermal conductive gel, a thermal conductive film and a heat spreader. The thermal conductive gel is disposed over the semiconductor package. The thermal conductive film is disposed over the semiconductor package and the thermal conductive gel. A thermal conductivity of the thermal conductive film is different from a thermal conductivity of the thermal conductive gel. The thermal conductive film is surrounded by the heat spreader.