A stack package is disclosed. A first semiconductor die and a supporter are disposed on a package substrate. The supporter may include a second side facing a first side of the first semiconductor die having a substantially inclined surface. A second semiconductor die is stacked on the first semiconductor die and on the supporter. An encapsulant layer is formed to fill a portion between the supporter and the first semiconductor die.

A semiconductor device includes a substrate having a first surface, a second surface opposite to the first surface, conductive connections provided on the first surface, and columnar electrodes each extending from a corresponding one of the conductive connections toward the second surface, each of the columnar electrodes having a tapered shape; and a semiconductor chip having a third surface facing the first surface and a plurality of connection bumps provided on the third surface, each of the plurality of connection bumps electrically connected to a corresponding one of the plurality of conductive connections. A first one of the columnar electrodes, located in a first region of a chip region, has a first tapered shape. A second one of the columnar electrodes, located in a second region of the chip region, has a second tapered shape different from the first tapered shape.

An electronic device includes a first support platelet and a second support platelet that is disposed opposite and at a distance from the first support platelet. At least one first electronic chip is mounted on the first support platelet on a side facing the second support platelet. A second electronic chip is mounted on the second support platelet on a side facing the first support platelet. A heat sink that includes at least one interposition plate is interposed between the first and second electronic chips.

A microelectronic assembly can include a substrate having first and second surfaces and an aperture extending therebetween, the substrate having terminals. The assembly can also include a first microelectronic element having a front surface facing the first surface of the substrate, a second microelectronic element having a front surface facing the first microelectronic element and projecting beyond an edge of the first microelectronic element, first and second leads electrically connecting contacts of the respective first and second microelectronic elements to the terminals, and third leads electrically interconnecting the contacts of the first and second microelectronic elements. The contacts of the first microelectronic element can be exposed at the front surface thereof adjacent the edge thereof. The contacts of the second microelectronic element can be disposed in a central region of the front surface thereof. The first, second, and third leads can have portions aligned with the aperture.

A packaged integrated circuit device includes a substrate having a spacer chip thereon, which is devoid of active integrated circuits therein but which has a stress-relieving pattern of grooves in an upper surface thereof. A first semiconductor chip is provided, which is bonded to the upper surface of the spacer chip. A molded region is provided, which includes a passivating resin that: (i) at least partially surrounds the first semiconductor chip and the spacer chip, and (ii) extends into at least a portion of the grooves within the upper surface of the spacer chip.

A semiconductor device according to the present embodiment includes a circuit board comprising a plurality of electrodes provided on a first surface, a first resin layer provided on the first surface around the electrodes, and a second resin layer provided on the first resin layer. A first semiconductor chip is connected to a first one of the electrodes. A second semiconductor chip is provided above the first semiconductor chip, being larger than the first semiconductor chip, and is connected to a second one of the electrodes via a metal wire. A third resin layer is provided between the first semiconductor chip and the second semiconductor chip and between the second resin layer and the second semiconductor chip, and covers the first semiconductor chip.

A method for manufacturing a semiconductor device includes providing an adhesive film over a first surface of a semiconductor wafer on which a semiconductor device layer and a bump electrically connected to the semiconductor device layer are formed, forming a slit in the adhesive film, fragmenting the semiconductor wafer into semiconductor chips along the slit, and connecting the bump to a wiring of a circuit board within the adhesive film.

A semiconductor package according to the inventive concept includes a first semiconductor chip configured to include a first semiconductor device, a first semiconductor substrate, a plurality of through electrodes penetrating the first semiconductor substrate, and a plurality of first chip connection pads arranged on an upper surface of the first semiconductor substrate; a plurality of second semiconductor chips sequentially stacked on an upper surface of the first semiconductor chip and configured to each include a second semiconductor substrate, a second semiconductor device controlled by the first semiconductor chip, and a plurality of second chip connection pads arranged on an upper surface of the second semiconductor substrate; a plurality of bonding wires configured to connect the plurality of first chip connection pads to the plurality of second chip connection pads; and a plurality of external connection terminals arranged on a lower surface of the first semiconductor chip.

A packaged module for use in a wireless communication device has a substrate supporting a first integrated circuit die that implements at least a portion of a radio frequency baseband subsystem and a second integrated circuit die that implements at least a portion of a radio frequency front end including a radio frequency power amplifier. The substrate is disposed between the first integrated circuit die and the second integrated circuit die. An overmold encloses one of the first integrated circuit die and the second integrated circuit die.

A packaged module for a radio frequency wireless device has a substrate supporting a first wireless device component and a second wireless device component where the first wireless device component is between the second wireless device component and a first surface of the substrate. At least a first overhanging portion of the second wireless device component extends beyond at least a portion of the periphery of the first wireless device component.