A monolithic electronic device includes a plurality of rigid portions arranged in a polyhedron shape and a plurality of in-plane and out-of-plane deformable portions connecting the plurality of rigid portions to each other. Each of the plurality of rigid portions has an outer side and an opposing inner side. The inner of each of the plurality of rigid portions face an inside of the polyhedron shape. At least some of the plurality of rigid portions include semiconductor devices on both the outer and inner sides. The plurality of rigid portions and the plurality of in-plane and out-of-plane deformable portions are monolithic.

A semiconductor package structure is provided. The semiconductor package structure includes a carrier, a first electronic component, a second electronic component, a third electronic component, a fourth electronic component, and a connection element. The first electronic component is disposed over a surface of the carrier. The second electronic component is disposed over the first electronic component. The third electronic component is spaced apart from the first electronic component and disposed over the surface of the carrier. The fourth electronic component is disposed over the third electronic component. The connection element is electrically connecting the second electronic component to the fourth electronic component.

Provided is an electronic component including a pad region including a plurality of pads extending along corresponding extension lines and arranged in a first direction, and a signal wire configured to receive a driving signal from the pad region, wherein the plurality of pads include a plurality of first pads arranged continuously and a plurality of second pads arranged continuously, and extension lines of the plurality of first pads substantially converge into a first point and extension lines of the plurality of second pads substantially converge into a second point different from the first point.

A display device includes a substrate, conductive pads arranged on the substrate over a plurality of rows, and a drive circuit chip including bumps arranged over a plurality of rows to be electrically connected with the conductive pads, and the conductive pads arranged in a same row are arranged in parallel, and the bumps arranged in a same row are arranged in a zigzag form so as to be partially shifted.

A novel 3D package configuration is provided by stacking a plurality of semiconductor package units or a folded flexible circuit board structure on a lead frame and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.

A semiconductor structure includes a substrate, a chip, a plurality of conductive bumps, a flexible printed circuit (FPC) board and a plurality of circuit patterns. The chip is disposed on the substrate and includes a plurality of pads. The conductive bumps are disposed on the pads respectively. The FPC board is connected between the substrate and the chip, and the conductive bumps penetrate through an end of the FPC board. The circuit patterns are disposed on the FPC board and electrically connected to the conductive bumps and the substrate.

An integrated device package is disclosed. The package can include a carrier and an integrated device die having a front side and a back side. A mounting structure can serve to mount the back side of the integrated device die to the carrier. The mounting structure can comprise a first layer over the carrier and a second element between the back side of the integrated device die and the first layer. The first layer can comprise a first insulating material that adheres to the carrier, and the second element can comprise a second insulating material.

A monolithic electronic device includes a plurality of rigid portions arranged in a polyhedron shape and a plurality of in-plane and out-of-plane deformable portions connecting the plurality of rigid portions to each other. Each of the plurality of rigid portions has an outer side and an opposing inner side. The inner of each of the plurality of rigid portions face an inside of the polyhedron shape. At least some of the plurality of rigid portions include semiconductor devices on both the outer and inner sides. The plurality of rigid portions and the plurality of in-plane and out-of-plane deformable portions are monolithic.

A multi-conductor interconnect for a microelectronic device incorporates multiple conductors and integrated shielding for the conductors. The multi-conductor interconnect includes first and second groups of conductors interleaved with one another within a dielectric structure. One of the groups of conductors may be coupled to a reference voltage node to provide shielding for the other group of conductors. The multi-conductor interconnect may further include a shield layer extending over some portion, or all, of the conductors of the first and second groups.

An apparatus is provided which comprises: a first die having at least one bond pad; a first flexible layer comprising an anisotropic conductive material, wherein the first flexible layer is adjacent to the at least one bond pad such that it makes an electrical contact with the at least one bond pad; and a second flexible layer comprising a conductive metal, wherein the second flexible layer is adjacent to the first flexible layer.