Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device. The getter material can be a conductive or an insulating material. The getter material can be present as a continuous or discontinuous film. The device can be a SiC semiconductor device such as a SiC vertical MOSFET. Methods of making the devices are also described. Semiconductor devices and methods of making the same comprising source ohmic contacts formed using a self-aligned process are also described. The source ohmic contacts can comprise titanium silicide and/or titanium silicide carbide and can act as a getter material.

A method for producing a 3D memory device, the method including: providing a first level including a first single crystal layer; forming a plurality of first transistors each including a single crystal channel; forming a first metal layer and a second metal layer, where the first level includes the plurality of first transistors, the first metal layer, and the second metal layer; forming at least one second level disposed above the second metal layer; performing a first etch step including etching first holes within the second level; forming at least one third level above the at least one second level; performing a second etch step including etching second holes within the third level; and performing additional processing steps to form a plurality of first memory cells within the second level and a plurality of second memory cells within the third level, where memory cells each include one memory transistor.

A semiconductor device, including a conductive plate having a front surface that includes a plurality of bonding regions and a plurality of non-bonding regions in peripheries of the bonding regions, a plurality of semiconductor elements mounted on the conductive plate in the bonding regions, and a resin encapsulating therein at least the plurality of semiconductor elements and the front surface of the conductive plate. The conductive plate has, at the front surface thereof in the non-bonding regions, a plurality of holes.

According to the present disclosure, a semiconductor apparatus comprises an insulating substrate. A porous material is directly bonded to the insulating substrate. And a semiconductor device is bonded to the porous material via a bonding material. The bonding material contains metal nanoparticles.

A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including first transistors, where the first transistors each include a single crystal channel; first metal layers interconnecting at least the first transistors; and a second level including a second single crystal layer, the second level including second transistors, where the second level overlays the first level, where the second level is bonded to the first level, where the bonded includes oxide to oxide bonds, where the second transistors each include at least two side-gates, and where through the first metal layers power is provided to at least one of the second transistors.

A method for producing a 3D semiconductor device including: providing a first level including a first single crystal layer; forming a first metal layer on top of the first level; forming a second metal layer on top of the first metal layer; forming at least one second level above the second metal layer; performing a first lithography step on the second level; forming a third level on top of the second level; performing processing steps to form first memory cells within the second level and form second memory cells within the third level, where the first memory cells include at least one second transistor, and the second memory cells include at least one third transistor; and then at performing at least one deposition step which deposits gate electrodes for both the second and the third transistors, and forming at least four independent memory arrays.

Provided is a semiconductor device including: a bed having a bed surface; a semiconductor chip having a bottom surface larger than the bed surface, the semiconductor chip being provided such that a center of the bottom surface is disposed above the bed surface and the bottom surface having a first end and a second end; a joint material provided between the bed surface and the bottom surface; a plate-like first wire having a first surface and provided such that the first surface faces the first end; a plate-like second wire having a second surface and provided such that the second surface faces the second end; a first insulating film having a third surface and a fourth surface provided on an opposite side of the third surface, the third surface being in contact with the first end, the fourth surface being in contact with the first surface; and a second insulating film having a fifth surface and a sixth surface provided on an opposite side of the fifth surface, the fifth surface being in contact with the second end, the sixth surface being in contact with the first surface.

An embodiment of the present invention provides a method for producing a bonded object. The method comprises a step for preparing a laminate in which a first member, a copper bonding paste, and a second member are laminated in order and a step for sintering the copper bonding paste under a pressure of 0.1-1 MPa. The copper bonding paste contains metal particles and a dispersion medium, wherein the content of metal particles is at 50 mass % or more with respect to the total mass of the copper bonding paste, and the metal particles contain 95 mass % or more of submicro copper particles with respect to the total mass of the metal particles.

An embodiment of the present invention provides a method for producing a bonded object. The method comprises a step for preparing a laminate in which a first member, a copper bonding paste, and a second member are laminated in order and a step for sintering the copper bonding paste under a pressure of 0.1-1 MPa. The copper bonding paste contains metal particles and a dispersion medium, wherein the content of metal particles is at 50 mass % or more with respect to the total mass of the copper bonding paste, and the metal particles contain 95 mass % or more of submicro copper particles with respect to the total mass of the metal particles.

A multi-clip structure includes a first clip for die bonding and a second clip for die bonding. The multi-clip structure further includes a retaining tape fixed to the first clip and to the second clip to hold the first clip and the second clip together.