The task of the present invention is to achieve gain enhancement. A terahertz device (10) of the present invention includes a terahertz element (20) generating an electromagnetic wave, a dielectric (50) including a dielectric material and surrounding the terahertz element (20), a gas space (92) including a gas, and a reflecting film (82) serving as a reflecting portion. The reflecting film (82) includes a portion opposing the terahertz element (20) through the dielectric (50) and the gas space (92) and reflecting the electromagnetic wave toward a direction, wherein the electromagnetic wave is generated from the terahertz element (20) and transmitted through the dielectric (50) and the gas space (92). In addition, the refractive index of the dielectric (50) is lower than the refractive index of the terahertz element (20) and is higher than the refractive index of the gas in the gas space (92).

The present disclosure relates to a semiconductor device and a method manufacturing thereof. The object of the present disclosure is to simplify manufacturing steps of a semiconductor device. A semiconductor device of the present disclosure includes an organic film electrically insulative and penetrated by a through hole in a thickness direction, a conductive layer formed on the organic film and made of a copper (Cu)-based and titanium (Ti)-free alloy, a Cu wiring layer formed on the conductive layer, a semiconductor element mounted on the Cu wiring layer, a sealing resin sealing the semiconductor element, and an external terminal connected to the conductive layer. The conductive layer includes the exposed conductive portion exposed from the organic film by entering the through hole. The external terminal is in contact with the exposed conductive portion.

An integrated circuit package includes a substrate with traces for high speed communication that are subject to crosstalk. The traces include overlapping pads on different layers of the substrate, which can increase the mutual capacitance of the signal lines, which will offset the mutual inductance. Thus, the overlapping pads can reduce the crosstalk between the signal traces.

A package substrate is adapted to a ball grid array package. The substrate includes two substrate contacts, two solder ball pads, two via holes and two signal lines. A connection line of the two substrate contacts is substantially perpendicular to a connection line of the two solder ball pads. The two substrate contacts are respectively connected to the two via holes by the two signal lines. Each signal line includes a circuit trace section, an approaching section and a bifurcating section connected in sequence. The two circuit trace sections of each signal line are substantially arranged in parallel. The two approaching sections are substantially arranged in parallel and substantially symmetrical about the connection line of the solder ball pads. The two bifurcating sections are substantially symmetrical about the pad connection line and respectively electrically connected to the two via holes.

A light emitting device for a display including: a base layer; a first LED sub-unit, a second LED sub-unit, and a third LED sub-unit on the base layer; and a supporting layer covering the first LED sub-unit, the second LED sub-unit, and the third LED sub-unit, in which the third LED sub-unit is configured to emit light having a shorter wavelength than that of light emitted from the first LED sub-unit, and to emit light having a longer wavelength than that of light emitted from the second LED sub-unit, and a luminous intensity ratio of light emitted from the third LED sub-unit and the second LED sub-unit is configured to be about 6:1.

There is provided a semiconductor device that includes a wiring layer having a main surface and a rear surface which face opposite sides in a thickness direction, a first insulating layer covering an entirety of the rear surface, a second insulating layer which is in contact with the main surface, a semiconductor element which faces the second insulating layer and is mounted on the wiring layer, and a sealing resin which is in contact with the second insulating layer and covers the semiconductor element, wherein surface roughness of the main surface is larger than surface roughness of the rear surface.

Disclosed herein is a chip-on-film including: a base film; a driver mounted on one of upper and lower surfaces of the base film; and at least one pad group, which includes signal wiring lines disposed on the upper and lower surfaces of the base film and transmitting signals via two paths, a first pad and a second pad disposed on one of the upper and lower surfaces of the base film, and a plurality of through-holes disposed between the first pad and the second pad and electrically connecting the signal wiring lines to each other, wherein the first pad and the second pad are separated a predetermined distance from each other in a width direction of the base film, and each of the first pad and the second pad is obliquely arranged in plural in a longitudinal direction of the base film.

A novel and useful a single layer RFIC/MMIC structure including a package and related redistribution layer (RDL) based low loss grounded coplanar transmission line. The structure includes a package molded around an RF circuit die with a single redistribution layer (RDL) fabricated on the surface thereof mounted on an RF printed circuit board (PCB) via a plurality of solder balls. Coplanar transmission lines are fabricated on the RDL to conduct RF output signals from the die to PCB signal solder balls. The signal trace transition to the solder balls are funnel shaped to minimize insertion loss and maximize RF isolation between channels. A conductive ground shield is fabricated on the single RDL and operative to shield the plurality of coplanar transmission lines. The ground shield is electrically connected to a ground plane on the PCB via a plurality of ground solder balls arranged to surround the plurality of coplanar RF transmission lines and signal solder balls, and are operative to couple the ground shield to the ground plane on the PCB and provide an electrical return path for the plurality of coplanar transmission lines. Ground vias on the printed circuit board can be either located under the ground solder balls or between them.

An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

A semiconductor package includes: a substrate having first substrate pads formed at one side edge thereof in a first direction and second substrate pads formed at an other side edge thereof in the first direction; a sub semiconductor package formed on the substrate, and including a sub semiconductor chip, a sub molding layer which surrounds side surfaces of the sub semiconductor chip and redistribution conductive layers which extend onto the sub molding layer while being connected with sub chip pads of the sub semiconductor chip and are connected to first redistribution pads and second redistribution pads formed at one side edge and the other side edge, respectively, of the sub molding layer in the first direction; a first chip stack formed on the sub semiconductor package, and including first main semiconductor chips; and a second chip stack formed on the first chip stack, and including second main semiconductor chips.