Patent classifications
H01L2924/15791
Conformal electronics including nested serpentine interconnects
An example stretchable device is described that includes electrical contacts and an interconnect coupling the electrical contacts. The interconnect has a meander-shaped configuration that includes at least one nested serpentine-shaped feature. The interconnect can be conductive or non-conductive. The meander-shaped configuration can be a serpentine structure, providing a serpentine-in-serpentine configuration.
Semiconductor device having polyimide layer
Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the glass transition temperatures of the earlier applied dielectric layers. In one embodiment, the glass transition temperatures of earlier applied dielectric films in a build-up interconnect are increased through a thermosetting process to exceed the temperature for laminating the later applied dielectric films. In one embodiment, a polyimide material is formed with embedded catalysts to promote cross-linking after a film of the polyimide material is laminated (e.g., through photo-chemical or thermal degradation of the encapsulant of the catalysts). In one embodiment, the solder resist opening walls have a wettable layer generated through laser assisted seeding so that there is no gap between the solder resist opening walls and no underfill in the solder resist opening.
Bendable and stretchable electronic devices and methods
Generally discussed herein are systems and methods that can include a stretchable and bendable device. According to an example a method can include (1) depositing a first elastomer material on a panel, (2) laminating trace material on the elastomer material, (3) processing the trace material to pattern the trace material into one or more traces and one or more bond pads, (4) attaching a die to the one or more bond pads, or (5) depositing a second elastomer material on and around the one or more traces, the bonds pads, and the die to encapsulate the one or more traces and the one or more bond pads in the first and second elastomer materials.
Module and manufacturing method thereof
The module is implemented on a circuit board, the module including a wiring board; an electronic component implemented on a first surface of the wiring board; an external connection electrode formed on a second surface of the wiring board; a solder bump connected to the external connection electrode; a bare chip implemented facedown on the second surface of the wiring board; and a resin covering a surface and a side surface of the bare chip and a side surface of the solder bump on the second surface of the wiring board, wherein a reverse surface of the bare chip and a connection surface of the solder bump are exposed from the resin such that the reverse surface of the bare chip and the connection surface of the solder bump are on a same plane, and wherein the module is implemented on the circuit board so that the reverse surface of the bare chip and the connection surface of the solder bump face the circuit board.
MODULE AND MANUFACTURING METHOD THEREOF
The module is implemented on a circuit board, the module including a wiring board; an electronic component implemented on a first surface of the wiring board; an external connection electrode formed on a second surface of the wiring board; a solder bump connected to the external connection electrode; a bare chip implemented facedown on the second surface of the wiring board; and a resin covering a surface and a side surface of the bare chip and a side surface of the solder bump on the second surface of the wiring board, wherein a reverse surface of the bare chip and a connection surface of the solder bump are exposed from the resin such that the reverse surface of the bare chip and the connection surface of the solder bump are on a same plane, and wherein the module is implemented on the circuit board so that the reverse surface of the bare chip and the connection surface of the solder bump face the circuit board.
CONFORMAL ELECTRONICS INCLUDING NESTED SERPENTINE INTERCONNECTS
An example stretchable device is described that includes electrical contacts and an interconnect coupling the electrical contacts. The interconnect has a meander-shaped configuration that includes at least one nested serpentine-shaped feature. The interconnect can be conductive or non-conductive. The meander-shaped configuration can be a serpentine structure, providing a serpentine-in-serpentine configuration.
Conformal electronics including nested serpentine interconnects
An example stretchable device is described that includes electrical contacts and an interconnect coupling the electrical contacts. The interconnect has a meander-shaped configuration that includes at least one nested serpentine-shaped feature. The interconnect can be conductive or non-conductive. The meander-shaped configuration can be a serpentine structure, providing a serpentine-in-serpentine configuration.
MATERIALS, STRUCTURES AND METHODS FOR MICROELECTRONIC PACKAGING
Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the glass transition temperatures of the earlier applied dielectric layers. In one embodiment, the glass transition temperatures of earlier applied dielectric films in a build-up interconnect are increased through a thermosetting process to exceed the temperature for laminating the later applied dielectric films. In one embodiment, a polyimide material is formed with embedded catalysts to promote cross-linking after a film of the polyimide material is laminated (e.g., through photo-chemical or thermal degradation of the encapsulant of the catalysts). In one embodiment, the solder resist opening walls have a wettable layer generated through laser assisted seeding so that there is no gap between the solder resist opening walls and no underfill in the solder resist opening.
MODULE CONTAINING FAN-OUT WAFER-LEVEL PACKAGING (FOWLP) UNIT CONNECTED TO ELECTRONIC COMPONENT BY WIRE BONDING
A module containing a fan-out wafer-level packaging unit connected to an electronic component by wire bonding and having a substrate, a first die, a first dielectric layer, first conductive circuits, a second dielectric layer, second conductive circuits, a second die, an electronic component, at least one first bonding wire, at least two second bonding wires, and at least one third bonding wire is provided. The second conductive circuits are formed by grinding of a metal paste filled in a plurality of second slots of the second dielectric layer. The second conductive circuits form bonding pads in the second slots. The first die is electrically connected to the outside by the bonding pads around a chip area of a second surface of the first die. Thereby the problems generated during manufacturing of the conductive circuits including higher manufacturing cost and less environmental benefit are solved.