A package structure and a method for manufacturing a package structure are provided. The package structure includes a first wiring structure and at least one electronic device. The at least one electronic device is connected to the first wiring structure through at least two joint structures. The at least two joint structures respectively include different materials.

A package structure includes a substrate, a first electronic component, a second electronic component, a third electronic component and a connection component. The substrate includes a first surface and a second surface opposite the first surface. The first electronic component is disposed at the substrate and has a first active surface exposed from the second surface of the substrate. The second electronic component includes a second active surface facing the first active surface of the first electronic component. The second active surface of the second electronic component is electrically connected to the first active surface of the first electronic component. The third electronic component includes a third active surface facing the first active face of the first electronic component. The connection component electrically connects the third active surface of the third electronic component to the first active surface of the first electronic component. The connection component has at least two bendings.

There is provided a semiconductor device including: a conductive support including a first die pad and a second die pad having a potential different from a potential of the first die pad; a first semiconductor element mounted on the first die pad; a second semiconductor element mounted on the second die pad; and a sealing resin that covers the first semiconductor element, the second semiconductor element, and at least a portion of the conductive support.

Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.

Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.

The electronic device includes first and second semiconductor components. And, the electronic device includes a sealing body for sealing the first semiconductor component (i.e., the logic chip). A plurality of through conductors electrically connected to the first semiconductor component and/or the second semiconductor component is formed in the sealing body. In plan view, the sealing body has a first region in which the first semiconductor component is located, a second region located on a periphery of a first surface of the sealing body, a third region located between the second region and the first region, and a fourth region located between the second region and the third region. The plurality of through conductors is arranged most in the second region. The number of the plurality of through conductors located in the third region is larger than the number of the plurality of through conductors located in the fourth region.

Electronic device comprising a support substrate having a mounting face and an electronic chip having a rear face bonded on the mounting face by a volume of adhesive, wherein the support substrate comprises a plurality of wedging elements projecting from the mounting face so as to hold the chip bearing on contact areas of the wedging elements in a position substantially parallel to the mounting face of the support substrate.

A microelectronic package may be fabricated having at least one microelectronic die attached to a microelectronic substrate, wherein the microelectronic substrate includes at least one notch formed in at least one side thereof. The microelectronic dice may be attached to a first surface of the microelectronic substrate and in electronic communication with a bond pad on a second surface of the microelectronic substrate with a bond wire which extends through the notch in the microelectronic substrate.

An image sensor package according to an embodiment of the present technology includes: a solid-state image sensor; a transparent substrate; and a package substrate. The solid-state image sensor has a light-receiving surface including a light-reception unit and a first terminal unit, and a rear surface opposite to the light-receiving surface. The transparent substrate faces the light-receiving surface. The package substrate includes a frame portion, a second terminal unit, and a supporting body. The frame portion has a joint surface to be joined to the transparent substrate and includes a housing portion housing the solid-state image sensor. The second terminal unit is to be wire-bonded to the first terminal unit, the second terminal unit being provided in the frame portion. The supporting body is provided in a peripheral portion of the light-receiving surface or at a center portion of the rear surface and partially supports the light-receiving surface or the rear surface.

An integrated semiconductor device and a method for manufacturing the integrated semiconductor device are disclosed. In an embodiment an integrated semiconductor device includes a supporting substrate having a first substrate face and a second substrate face opposite to the first substrate face, a semiconductor die having a first die face coupled to the first substrate face of the supporting substrate, the first die face including first die contact pads, wherein the supporting substrate has at least one through opening, wherein the first die contact pads are arranged facing the through opening, and wherein the supporting substrate comprises first substrate contact pads connected by first bonding wires to the respective first die contact pads through the through opening.