A resonant DC-DC converter may include an input for inputting a DC supply voltage, an output for providing a DC voltage to a load, an output rectifier to convert the converter voltage into a DC voltage, a resonant half-bridge inverter comprising two switches in series with a first serial resonant circuit to adjust the output current of the converter, and a second serial resonant circuit to block DC current in the converter and provide current continuity within the converter. The resonance of the first serial resonant circuit is measured after every start of the converter and each measurement defines the switching frequency of the half-bridge inverter. The switches of the half-bridge inverter wherein the driving of the half-bridge inverter includes a key gap during operation thereof. The resonance frequency of the second serial resonant circuit is at least slightly above the switching frequency of the half-bridge inverter.

Bias supplies and plasma processing systems are disclosed. One bias supply comprises an output node, a return node, and a switch network and at least one power supply coupled to the output node and the return node. The switch network and the at least one power supply configured, in combination, to apply an asymmetric periodic voltage waveform and provide a corresponding current waveform at the output node relative to the return node. A timing parameter estimator receives a digital representation of a full cycle of the voltage and current waveforms, and generates a pulse width control signal based on a crossing time that the current waveform crosses a threshold current value after falling from a positive peak current value to control the switch network.

Bias supplies and plasma processing systems are disclosed. One bias supply comprises an output node, a return node, and a switch network and at least one power supply coupled to the output node and the return node. The switch network and the at least one power supply configured, in combination, to apply an asymmetric periodic voltage waveform and provide a corresponding current waveform at the output node relative to the return node. A timing parameter estimator receives a digital representation of a full cycle of the voltage and current waveforms, and generates a pulse width control signal based on a crossing time that the current waveform crosses a threshold current value after falling from a positive peak current value to control the switch network.

Provided are a power supply conversion device and a charging control method. The device includes: a transformer; a first rectifier circuit connected to a primary winding of the transformer used for converting a received alternating current into a first direct current, a voltage value of the first direct current being a first direct-current voltage, and the transformer used for converting the first direct-current voltage into a second direct-current voltage; a voltage converter connected to a secondary winding of the transformer and used for converting the second direct-current voltage to output a constant direct-current voltage or a pulsating direct-current voltage; and a controller connected to the first rectifier circuit and the voltage converter and used for controlling the voltage converter to selectably output the constant direct-current voltage or the pulsating direct-current voltage according to a desired charging mode of a device to be charged connected to the power supply conversion device.

A control circuit for outputting a direct current (DC) signal in the form of a pulsed signal includes a switch circuit having a first terminal, a second terminal, a third terminal, a fourth terminal, a first control terminal, and a second control terminal, wherein the first terminal and the second terminal are input terminals of the DC signal, the third terminal and the fourth terminal are output terminals of the pulsed signal, the first control terminal and the second control terminal receive a first signal or a second signal to control outputting the pulsed signal, in response to the first control terminal and the second control terminal receiving the first signal, the third terminal and the fourth terminal output the pulsed signal, and in response to the first control terminal and the second control terminal receiving the second signal, the third terminal and the fourth terminal stop outputting the pulsed signal; and an energy storage circuit having two terminals connected to the first terminal and the second terminal of the switch circuit to store residual electric energy of the switch circuit when the switch circuit does not output the pulsed signal. The control circuit reduces the oscillation the voltage of occurred at the end of each pulse, and improving the accuracy of controlling the plasma energy and density used in the semiconductor processes.

A control circuit for outputting a direct current (DC) signal in the form of a pulsed signal includes a switch circuit having a first terminal, a second terminal, a third terminal, a fourth terminal, a first control terminal, and a second control terminal, wherein the first terminal and the second terminal are input terminals of the DC signal, the third terminal and the fourth terminal are output terminals of the pulsed signal, the first control terminal and the second control terminal receive a first signal or a second signal to control outputting the pulsed signal, in response to the first control terminal and the second control terminal receiving the first signal, the third terminal and the fourth terminal output the pulsed signal, and in response to the first control terminal and the second control terminal receiving the second signal, the third terminal and the fourth terminal stop outputting the pulsed signal; and an energy storage circuit having two terminals connected to the first terminal and the second terminal of the switch circuit to store residual electric energy of the switch circuit when the switch circuit does not output the pulsed signal. The control circuit reduces the oscillation the voltage of occurred at the end of each pulse, and improving the accuracy of controlling the plasma energy and density used in the semiconductor processes.

A switching controller generates control pulses for specifying on/off states of a first transistor and a second transistor. One end of a capacitor is coupled to a switching node. A constant voltage is applied to the other end of the capacitor via a rectifier element. A dead time controller controls a delay time between adjacent edges of the first control pulse and the second control pulse according to a sensing voltage across both ends of the capacitor.

A switching controller generates control pulses for specifying on/off states of a first transistor and a second transistor. One end of a capacitor is coupled to a switching node. A constant voltage is applied to the other end of the capacitor via a rectifier element. A dead time controller controls a delay time between adjacent edges of the first control pulse and the second control pulse according to a sensing voltage across both ends of the capacitor.

A charge-discharge unit includes a discharge circuit, a charge-discharge circuit, wires respectively connecting the discharge circuit and the charge-discharge circuit to a load, and a unit controller to control the discharge circuit and the charge-discharge circuit. The unit controller is configured or programmed to control the discharge circuit and the charge-discharge circuit in a first mode or a second mode. In the first mode, the discharge circuit and the charge-discharge circuit are controlled such that the discharge circuit outputs to the load a current greater than zero, and the charge-discharge circuit outputs to a battery a current greater than zero. In the second mode, the discharge circuit is controlled to output to the load a current of a value greater than zero, and the charge-discharge circuit is caused to perform a charge termination operation of stopping the current outputted to the battery.

A differential amplifier circuit of the present invention includes a differential input circuit including first and second transistors, and amplifies a difference voltage between a first input voltage applied to a control terminal of the first transistor and a second input voltage applied to a control terminal of the second transistor. The differential input circuit a P-channel depletion type transistor having a gate connected to the control terminal of the first transistor and a source connected to the control terminal of the second transistor, and the P-channel depletion type transistor operates as a bias current source of the differential amplifier circuit.