A radio frequency (RF) transmitter includes a set of input ports to receive baseband samples of a signal to be transmitted on a set of disjoint frequency bands, a set of filter banks, there is one filter bank for each input port, each filter bank includes a plurality of digital polyphase interpolation filters to sample a shifted phase of the corresponding sequence of baseband samples and to interpolate the sampled phases to produce a plurality of sequences of interpolated baseband phased samples with the shifted phase, and a set of oscillators banks, each oscillator bank includes a plurality of polyphase Digital Direct Synthesizer (DDS) corresponding to the plurality of digital polyphase interpolation filters to generate a plurality of sequences of samples of digital waveform. The RF transmitter includes a set of mixer banks to mix corresponding sequences of samples of digital waveform and interpolated baseband phased samples to up convert each sequence of interpolated baseband phased samples to the effective frequency, a parallel digital combiner to combine in-phase sequences of interpolated baseband phased samples of different frequency bands to produce a plurality of sequences of multiband upconverted samples, and a pulse encoder to modulate and encode the plurality of sequences of multiband upconverted samples to produce a plurality of encoded multi-band signals. The RF transmitter converts the plurality of encoded multi-band signals into a RF bitstream and radiate the RF bitstream as an analog signal.

An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

Embodiments herein describe a hardened fractional resampler that includes a fixed filter that supports simultaneous processing of N input samples with minimal additional combinational logic and no additional multipliers. In one embodiment, the fractional resampler is implemented in an integrated circuit using hardened circuit. The embodiments below exploit a pattern in the order filter phases in fractional resampling systems (such as a SSR resampling system) to use filter phases in a single fixed filter to process multiple input samples in parallel, where these filter phases would have been unused in previous resampling systems.

A radio frequency (RF) transmitter includes a set of input ports to receive baseband samples of a signal to be transmitted on a set of disjoint frequency bands, a set of filter banks, there is one filter bank for each input port, each filter bank includes a plurality of digital polyphase interpolation filters to sample a shifted phase of the corresponding sequence of baseband samples and to interpolate the sampled phases to produce a plurality of sequences of interpolated baseband phased samples with the shifted phase, and a set of oscillators banks, each oscillator bank includes a plurality of polyphase Digital Direct Synthesizer (DDS) corresponding to the plurality of digital polyphase interpolation filters to generate a plurality of sequences of samples of digital waveform. The RF transmitter includes a set of mixer banks to mix corresponding sequences of samples of digital waveform and interpolated baseband phased samples to up convert each sequence of interpolated baseband phased samples to the effective frequency, a parallel digital combiner to combine in-phase sequences of interpolated baseband phased samples of different frequency bands to produce a plurality of sequences of multiband upconverted samples, and a pulse encoder to modulate and encode the plurality of sequences of multiband upconverted samples to produce a plurality of encoded multi-band signals. The RF transmitter converts the plurality of encoded multi-band signals into a RF bitstream and radiate the RF bitstream as an analog signal.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

A Finite Impulse Response (FIR) filter that reduces the complexity of the hardware required for a filter with a high decimation factor while achieving similar performance of prior art poly-phase filters of greater complexity. The FIR filter includes a small number of multiply-and-accumulate (MAC) units connected in parallel to each other between an input stream and an output stream. The MAC units are provided with coefficients from a memory. In an example implementation, the memory is addressed by a counter and the output of the memory selected by a multiplexer for suppling the coefficients.

Methods and apparatus are provided for adapting gain elements in digital filter chains. In one example, a digital filter chain includes a first digital filter and a second digital filter having an input coupled to an output of the first digital filter. A common gain is applied to signal samples passing between the first digital filter and the second digital filter, the common gain corresponding to a product of an output gain associated with the first digital filter and an input gain associated with the second digital filter. In another example, a digital filter includes an adjustable input gain element and an adjustable output gain element. The adjustable input gain element is configured to apply a gain value to an input signal sample, the gain value comprising a resultant difference of a bitshift configured for the digital filter and a bitwidth extension value. The adjustable output gain element is configured to apply an opposite of the gain value to an output signal sample.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

A parallel transfer rate converter inputs first parallel data with number of samples being S1 pieces in synchronism with a first clock, and outputs second parallel data with number of samples being S2=S1(m/p) pieces (p is an integer equal to or larger than 1) in synchronism with a second clock having a frequency which is p/m times of a frequency of the first clock. A convolution operation device inputs the second parallel data in synchronism with the second clock, generates third parallel data with number of samples being S3=S2(n/m) pieces (S3 is an integer equal to or larger than 1) by executing a convolution operation with a coefficient indicating a transmission characteristic to the second parallel data, and outputs the third parallel data in synchronism with the second clock.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.