Patent classifications
H03K17/61
Circuit arrangement and method for controlling semiconductor switching element
In order to reduce the problems with sharp-edged control voltages of semiconductor switching elements, it is provided that the control terminal (6) of the semiconductor switching element (1) is connected to the output terminal (7) of the semiconductor switching element (1) via a ramp generation unit (5), and the ramp generation unit (5) flattens the sharply ascending and descending edges of the driver control voltage (V.sub.S) into the form of a ramp, in order to generate a transistor control voltage (V.sub.G) at the output of the ramp generation unit (5).
Circuit arrangement and method for controlling semiconductor switching element
In order to reduce the problems with sharp-edged control voltages of semiconductor switching elements, it is provided that the control terminal (6) of the semiconductor switching element (1) is connected to the output terminal (7) of the semiconductor switching element (1) via a ramp generation unit (5), and the ramp generation unit (5) flattens the sharply ascending and descending edges of the driver control voltage (V.sub.S) into the form of a ramp, in order to generate a transistor control voltage (V.sub.G) at the output of the ramp generation unit (5).
High voltage switch with isolated power
A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 μs, and at a pulse frequency greater than 10 kHz.
CIRCUITRY FOR PROVIDING DIGITALLY STABLE GROUND
A small cell networking device mountable to a streetlight fixture includes circuitry for converting alternating current power into direct current (DC) power and providing a digitally stable ground for operation of the small cell device. The circuitry includes a transformer isolating a primary side from a secondary side of the circuitry. A switching controller on the primary side directs a switching circuit to selectively permit current flow through a primary side of the transformer to a first ground node on the primary side. A secondary winding of the transformer sources a rectified DC output relative to a second ground node that is isolated from the first ground node. In some cases, compensation on the secondary winding side provides isolated feedback to the controller, such as via an optical isolator. The controller directs the switching circuit based at least on the feedback and input from an auxiliary winding of the transformer.
CIRCUITRY FOR PROVIDING DIGITALLY STABLE GROUND
A small cell networking device mountable to a streetlight fixture includes circuitry for converting alternating current power into direct current (DC) power and providing a digitally stable ground for operation of the small cell device. The circuitry includes a transformer isolating a primary side from a secondary side of the circuitry. A switching controller on the primary side directs a switching circuit to selectively permit current flow through a primary side of the transformer to a first ground node on the primary side. A secondary winding of the transformer sources a rectified DC output relative to a second ground node that is isolated from the first ground node. In some cases, compensation on the secondary winding side provides isolated feedback to the controller, such as via an optical isolator. The controller directs the switching circuit based at least on the feedback and input from an auxiliary winding of the transformer.
Stray voltage detection
A processor-based device includes a chassis having a chassis ground node that is arranged to electrically couple the chassis to an earth ground. The device also includes a connector accessible from an exterior of the chassis. The connector conforms to a standardized powerline interface having a hot power signal, a load power signal, and a neutral power signal. A processor-based apparatus housed at least in part within the chassis is arranged to operate using DC power derived from AC power present at the powerline interface. A stray voltage detector is arranged to detect a stray voltage potential existing between the neutral power signal of the standardized powerline interface and the chassis ground node, and the processor-based device is arranged to communicate at least one indication of the detected stray voltage potential.
Stray voltage detection
A processor-based device includes a chassis having a chassis ground node that is arranged to electrically couple the chassis to an earth ground. The device also includes a connector accessible from an exterior of the chassis. The connector conforms to a standardized powerline interface having a hot power signal, a load power signal, and a neutral power signal. A processor-based apparatus housed at least in part within the chassis is arranged to operate using DC power derived from AC power present at the powerline interface. A stray voltage detector is arranged to detect a stray voltage potential existing between the neutral power signal of the standardized powerline interface and the chassis ground node, and the processor-based device is arranged to communicate at least one indication of the detected stray voltage potential.
SIGNAL TRANSMISSION CIRCUIT DEVICE, SEMICONDUCTOR DEVICE, METHOD AND APPARATUS FOR INSPECTING SEMICONDUCTOR DEVICE, SIGNAL TRANSMISSION DEVICE, AND MOTOR DRIVE APPARATUS USING SIGNAL TRANSMISSION DEVICE
Disclosed is a signal transmission circuit device (200) including a feedback signal transmission unit (210) that feeds back a control output signal (Sout) as a feedback signal (Sf) to an input side circuit (200A). A logical comparison circuit (212) detects “mismatch” between input and output by performing logical comparison between a control input signal (Sin) and the feedback signal (Sf). When a state of “mismatch” between input and output occurs, a first pulse generating circuit (202) or a second pulse generating circuit (204) outputs a first correction signal (Sa1) or a second correction signal (Sa2) corresponding to a potential (high level or low level) of the control input signal (Sin), and corrects the control output signal (Sout) to the same potential (high level or low level) as the control input signal (Sin). With such configuration, the mismatch
SIGNAL TRANSMISSION CIRCUIT DEVICE, SEMICONDUCTOR DEVICE, METHOD AND APPARATUS FOR INSPECTING SEMICONDUCTOR DEVICE, SIGNAL TRANSMISSION DEVICE, AND MOTOR DRIVE APPARATUS USING SIGNAL TRANSMISSION DEVICE
Disclosed is a signal transmission circuit device (200) including a feedback signal transmission unit (210) that feeds back a control output signal (Sout) as a feedback signal (Sf) to an input side circuit (200A). A logical comparison circuit (212) detects “mismatch” between input and output by performing logical comparison between a control input signal (Sin) and the feedback signal (Sf). When a state of “mismatch” between input and output occurs, a first pulse generating circuit (202) or a second pulse generating circuit (204) outputs a first correction signal (Sa1) or a second correction signal (Sa2) corresponding to a potential (high level or low level) of the control input signal (Sin), and corrects the control output signal (Sout) to the same potential (high level or low level) as the control input signal (Sin). With such configuration, the mismatch
LATERAL CORELESS TRANSFORMER
A multi-voltage domain device includes a semiconductor layer including a first voltage domain, a second voltage domain, and an isolation region that electrically isolates the first voltage domain and the second voltage domain in a lateral direction. The isolation region includes at least one deep trench isolation barrier. A layer stack is arranged on the semiconductor layer and includes a stack insulator layer, a first coil arranged in the stack insulator layer, and a second coil arranged in the stack insulator layer and laterally separated from the first coil in the lateral direction. The first and second coils are magnetically coupled to each other in the lateral direction. The first coil includes terminals arranged vertically over the first region and are electrically coupled to the first voltage domain, and the second coil includes terminals arranged vertically over the second region and are electrically coupled to the second voltage domain.