A Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) including: a comparing module and a calibration circuit. The comparing module is arranged to generate a first comparison result by comparing an input voltage value of the SAR ADC with a first voltage value and a second result by comparing the input voltage value with a second voltage value; the calibration circuit coupled to the comparing module is for generating a determination result determining whether the input voltage value is in a range according to the first comparison result and the second comparison result, and enters a calibration mode according to the determination result.

Methods and apparatus for determining non-linearity in analog-to-digital converters are disclosed. An example apparatus includes a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine at least one of a harmonic phase or a harmonic amplitude corresponding to the output; and an integral non-linearity (INL) term calculator to determine the INL of the ADC based on a characteristic of the periodic signal and the at least one of the harmonic phase or the harmonic amplitude.

Methods and apparatus for reducing non-linearity in analog to digital converters are disclosed. An example apparatus includes an analog-to-digital converter to convert an analog signal into a digital signal; and a non-linearity corrector coupled to the analog-to-digital converter to determine a derivative of the digital signal; determine cross terms including a combination of the digital signal and the derivative of the digital signal; and determine a non-linearity term corresponding to a combination of the cross terms.

A data converter includes multiple subunits to convert an input such as a radio frequency (RF) signal. The subunits are selected to sample the input in an order that varies over time. Two or more subunits are enabled at the same time. The selected subunits are configured to convert the input from an analog signal to a digital signal or vice versa.

A distance measuring method and an electronic laser distance measuring module, in particular for use in a distance measuring apparatus, especially configured as a laser tracker, tachymeter, laser scanner, or profiler, for fast signal detection with an analog-to-digital converter, wherein conversion errors that arise in the context of a signal digitization, in particular timing, gain and offset errors of the ADC, are compensated for by means of variation of the sampling instants.

An integrated circuit chip includes an interleaved analog-to-digital converter (ADC) and an interleaving calibration circuit. The interleaved ADC includes a plurality of ADCs that are each configured to sample an analog signal. The interleaved ADC is configured to convert the analog signal into an interleaved analog-to-digital signal (IADC signal) that includes a plurality of spurious signals formed from mismatches between the plurality of ADCs. The interleaving calibration circuit is configured to receive the IADC signal from the interleaved ADC, generate a mismatch profile estimate corresponding to the plurality of spurious signals to generate one or more mismatch profile estimates, determine whether a first mismatch profile estimate is in a frequency band of interest, and, in response to a determination that the first mismatch profile estimate is in the frequency band of interest, generate a set of model parameters based on the first mismatch profile estimate.

In various embodiments, at least one analog-to-digital converter (ADC) channel circuit may be used to convert an analog input signal into an output digital signal. A comparator threshold adjustment circuit may pseudorandomly modify at least one comparator threshold. A postprocessing circuit may identify, based on outputs of the ADC channel circuits, an ADC coefficient and may modify an output digital signal based on the ADC coefficient. As a result, the ADC channel circuits may more accurately convert the analog input signal into an output digital signal, as compared to a system that uses ADC channel circuits but does not include a postprocessing circuit. Further, a similar result may be obtained, as compared to a system that uses a higher gain amplifier, a higher speed amplifier, or both, but does not modify the one or more outputs.

Many systems implement calibration schemes to measure and correct for the non-idealities. Such systems can be complex, which makes them impractical to implement since the cost can potentially outweigh the benefits of the calibration scheme. To implement efficient and effective calibration, non-idealities or errors of a system are detected, in foreground or in background, in a piecewise fashion based on, e.g., correlations of an output signal with an uncorrelated random signal, where the correlation results are processed separately for different open intervals of an error signal. Second order and third order correction terms can be easily determined based on three open intervals. In various embodiments, the calibration scheme can detect and correct for linear errors, (linear and non-linear) memory/frequency dependent errors, static nonlinearity errors, Hammerstein-style non-linearity errors, and Wiener-style non-linearity errors (cross-terms).

Many systems implement calibration schemes to measure and correct for the non-idealities. Such systems can be complex, which makes them impractical to implement since the cost can potentially outweigh the benefits of the calibration scheme. To implement efficient and effective calibration, non-idealities or errors of a system are detected, in foreground or in background, in a piecewise fashion based on, e.g., correlations of an output signal with an uncorrelated random signal, where the correlation results are processed separately for different open intervals of an error signal. Second order and third order correction terms can be easily determined based on three open intervals. In various embodiments, the calibration scheme can detect and correct for linear errors, (linear and non-linear) memory/frequency dependent errors, static nonlinearity errors, Hammerstein-style non-linearity errors, and Wiener-style non-linearity errors (cross-terms).

A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.