A Wi-Fi wake-up receiver that receives wake-up signals encoded using orthogonal frequency division multiplexing based on-off keying (OFDM-OOK) modulation includes receiver circuitry having analog envelope detector circuitry configured to non-linearly down-convert an input signal and provide an energy signal for sampling by an analog-to-digital converter (ADC). A wake-up signal for waking up a main radio in a Wi-Fi device can be based on the digitized energy signal. The receiver circuitry can further include, upstream of the envelope detector circuitry and the ADC in the signal chain, an analog mixer for linearly down-converting the input signal and a low-pass filter for attenuating adjacent-channel interferer (ACI) signals prior to the non-linear down-conversion by the envelope detector circuitry. Sampling of the energy signal rather than the higher-bandwidth input signal yield power savings in the ADC and associated circuitry such as a modem.

An electricity usage monitor may include a coupling component to attach the electricity usage monitor to an electrical circuit to monitor electricity usage of the electrical circuit, an analog-digital converter (ADC) configured to convert analog current readings captured by the electricity usage monitor into digital values, a processor operably coupled to the ADC, and a non-transitory, computer-readable medium operably coupled to the processor and comprising instructions which, when executed by the processor, cause the processor to perform operations. The operations may include determining a standard deviation of the digital values, based on the standard deviation, adjusting a gain of the ADC, and transmitting a signal to a server comprising the digital values.

A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

Various embodiments of the present technology may comprise a method and apparatus for an analog-to digital converter (ADC). Methods and apparatus for an ADC according to various aspects of the present invention may operate in conjunction with a reference voltage that varies according to the frequency of a timing signal. By varying the reference voltage according to the frequency of the timing signal, the ADC generates a digital output having a substantially fixed voltage regardless of the frequency of the timing signal.

A communication receiving end for receiving an inputted signal includes a signal amplifier for adjusting the inputted signal according to a first predetermined gain or a second predetermined gain to generate a first adjusted signal; an analog-to-digital converter (ADC), coupled to the signal amplifier, for converting the first adjusted signal; and a control unit, coupled to the ADC, for determining whether the ADC is saturated or not according to an output of the ADC. The first predetermined gain is associated with a first inputted signal power processed by the communication receiving end and a quantization noise of the ADC. The second predetermined gain is associated with a second inputted signal power processed by the communication receiving end and a full scale level of the ADC. The first inputted signal power is smaller than the second inputted signal power.

A method for amplifying an echo signal, in which an analog echo signal suitable for detection of a vehicle's surroundings is amplified by a gain dependent on the transit time of the echo signal, the analog echo signal being amplified by an amplifier having a plurality of outputs, each having a different gain, and a downstream A/D converter having a time-variable reference voltage. In the process, there is a switch between the different outputs of the amplifier at predefined switching points in time, and the reference voltage of the A/D converter varies over time between the switching points in time in such a way that the echo signal is present at the output of the A/D converter with a transit time-dependent total gain having a predefined characteristic.

A communication receiving end for receiving an inputted signal includes a signal amplifier for adjusting the inputted signal according to a first predetermined gain or a second predetermined gain to generate a first adjusted signal; an analog-to-digital converter (ADC), coupled to the signal amplifier, for converting the first adjusted signal; and a control unit, coupled to the ADC, for determining whether the ADC is saturated or not according to an output of the ADC. The first predetermined gain is associated with a first inputted signal power processed by the communication receiving end and a quantization noise of the ADC. The second predetermined gain is associated with a second inputted signal power processed by the communication receiving end and a full scale level of the ADC. The first inputted signal power is smaller than the second inputted signal power.

Various embodiments of the present technology may comprise a method and apparatus for an analog-to digital converter (ADC). Methods and apparatus for an ADC according to various aspects of the present invention may operate in conjunction with a reference voltage that varies according to the frequency of a timing signal. By varying the reference voltage according to the frequency of the timing signal, the ADC generates a digital output having a substantially fixed voltage variation regardless of the frequency of the timing signal.

An A/D converter circuit has an amplifier circuit to amplify an input signal and output a first amplification signal and a second amplification signal, the second amplification signal having an amplification error smaller than that in the first amplification signal, a first sampling circuit to sample the first amplification signal, a first A/D converter to perform A/D conversion on the first amplification signal sampled by the first sampling circuit and output a first digital signal, a second sampling circuit to sample the second amplification signal, a D/A converter to perform D/A conversion on the first digital signal and output a first analog signal, a subtracter to subtract the first analog signal from the second amplification signal sampled by the second sampling circuit and output a second analog signal, and a second A/D converter to perform A/D conversion on the second analog signal and output a second digital signal.

An A/D converter circuit has an amplifier circuit to amplify an input signal and output a first amplification signal and a second amplification signal, the second amplification signal having an amplification error smaller than that in the first amplification signal, a first sampling circuit to sample the first amplification signal, a first A/D converter to perform A/D conversion on the first amplification signal sampled by the first sampling circuit and output a first digital signal, a second sampling circuit to sample the second amplification signal, a D/A converter to perform D/A conversion on the first digital signal and output a first analog signal, a subtracter to subtract the first analog signal from the second amplification signal sampled by the second sampling circuit and output a second analog signal, and a second A/D converter to perform A/D conversion on the second analog signal and output a second digital signal.