A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

Techniques and apparatus for successive approximation register (SAR) analog-to-digital converters (ADCs) with variable resolution. One example SAR ADC is generally configured to convert an analog input signal to a digital output signal, wherein a quantization size of a least significant bit (LSB) associated with the digital output signal is configured to depend on an amplitude of the analog input signal. By utilizing the techniques and apparatus described herein, a SAR ADC may be capable of a higher maximum sampling rate or a lower power dissipation.

A system includes a dither generator module that includes a most significant bits (MSB) dither generator device that generates a first random value. The dither generator module also includes a least significant bits (LSB) dither generator device that generates a second random value. The system further includes a first digital to analog converter (DAC) that receives a sum of the first random value and the second random value and generates a dither signal based on the sum of the first random value and the second random value. The system also includes an analog to digital converter (ADC) that receives a sum of the dither signal and a sampled input signal and generates a first digitized signal. The system includes a subtraction module that subtracts the sum of the first random value and the second random value from the first digitized signal to produce a digitized output signal.

An electricity usage monitor may include a coupling component to couple the electricity usage monitor to monitor an electrical circuit, a meter to measure electricity usage of the electrical circuit, an encoder to receive, from the meter, an electricity usage measurement to generate a measurement transmission based on the electricity usage measurement, and a communication interface configured to receive the measurement transmission from the encoder and to transmit the measurement transmission into a communication network for communication to a destination on the communication network.

Offset calibration for an analog front-end system is provided. The analog front-end system includes a variable-gain amplifier, and the calibration mitigates an offset error of the variable-gain amplifier. Calibration is based on a difference-based estimation technique combined with digital iteration. Difference-based estimation includes measuring different digital output signals from an analog-to-digital converter for different respective gains of the variable-gain amplifier. The digital iteration is utilized to estimate offsets values which converge a digital output difference to a target of zero volts.