Memory controllers, devices and associated methods are disclosed. In one embodiment, a memory controller includes write circuitry to transmit write data to a memory device, the write circuitry includes a write error detection correction (EDC) encoder to generate first error information associated with the write data. Data bus inversion (DBI) circuitry conditionally inverts data bits associated with each of the write data words based on threshold criteria. Read circuitry receives read data from the memory device. The read circuitry includes a read EDC encoder to generate second error information associated with the received read data. Logic evaluates the first and second error information and conditionally reverse-inverts at least a portion of the read data based on the decoding.

Provided are a data processing method and device. The data processing method includes: performing Polar code encoding on an input bit sequence having a length of K bits to obtain an encoded bit sequence having a length of N bits, and determining a bit sequence to be transmitted from the encoded bit sequence according to a data characteristic of an information bit sequence and a predetermined rate matching scheme. K is a positive integer and N is a positive integer greater than or equal to K.

An error correction circuit includes a syndrome calculator suitable for generating syndromes from an n-bit codeword for a single unit of time, an error location polynomial calculator suitable for generating error location polynomial coefficients based on the syndromes provided for the single unit of time, an error location calculator suitable for calculating error locations based on the error location polynomial coefficients for the single unit of time, and an error corrector suitable for correcting errors of the codeword based on the error locations for the single unit of time. The error correction circuit operates in a pipelining manner.

An error correction and fault, tolerance method and system for an array of disks is presented. The array comprises k+5 disks, where k disks store user data and 5 disks store computed parity. The present invention further comprises a method and a system for reconstituting the original content of each of the k+5 disks, when up to disks have been lost, wherein the number of disks at unknown locations is E and the number of disks wherein the location of the disks is known is Z. All combinations of faulty disks wherein Z+2E4 are reconstituted. Some combinations of faulty disks wherein Z+2E5 are either reconstituted, or errors are limited to a small list.

Systems and methods for Polar encoding with a blockwise checksum are provided. The method involves processing a set of K information blocks to produce a blockwise checksum with u blocks, where K>=2, and u>=1, and where each information block or checksum block contains P bits. The blockwise checksum may, for example, be a Fletcher checksum. The Polar code may be based on an m-fold Kronecker product matrix. Then, an N-bit input vector is produced with PK information bits and the Pu blockwise checksum bits, and with NPKPu frozen bits, where N=2.sup.m where m>=2. The N-bit input vector is processed to produce a result equivalent to multiplying the input vector by a Polar code generator matrix to produce a codeword. The codeword is then transmitted or stored.

An apparatus comprises an input register comprising a state register and a parity field, a first round secure hash algorithm (SHA) datapath communicatively coupled to the state register, comprising a first section to perform a ? step of a SHA calculation, a second section to perform a ? step and a ? step of the SHA calculation, a third section to perform a ? step of the SHA calculation and a fourth section to perform a ? step of the SHA calculation.

Systems and methods are disclosed for minimizing reads for reallocated sectors of a data storage medium. An apparatus may be configured to selectively skip over reallocated sectors in an LBA range without interrupting a read, via generating a skip mask or by beginning the read after the reallocated sector and reading the entire track up to the reallocated sector. When a number of sectors not read from the LBA range during the read operation is less than an amount of sectors that can be recovered based on an error correction capability, the data of the reallocated sector may be reconstructed using error correction data rather than by performing a read at the reallocated sector.

The present disclosure is directed to systems and methods for the secure transmission of plaintext data blocks encrypted using a NIST standard encryption to provide a plurality of ciphertext data blocks, and using the ciphertext data blocks to generate a Galois multiplication-based authentication tag and parity information that is communicated in parallel with the ciphertext blocks and provides a mechanism for error detection, location and correction for a single ciphertext data block or a plurality of ciphertext data blocks included on a storage device. The systems and methods include encrypting a plurality of plaintext blocks to provide a plurality of ciphertext blocks. The systems and methods include generating a Galois Message Authentication Code (GMAC) authentication tag and parity information using the ciphertext blocks. The GMAC authentication tag may be encrypted to provide a GIMAC authentication tag that is communicated in parallel with the ciphertext blocks to one or more recipient systems or devices.

A technique to accelerate Galois Field (GF) arithmetic. The technique, which does not rely on any specific processor instruction set, can be used to accelerate erasure coding within storage systems.

Disclosed apparatus and method improve the computational efficiency of encoding and decoding data having erasures according to a maximum distance separable (MDS) code based on a Reed-Solomon code. Thus, n encoded fragments are formed by multiplying k data fragments by an nk generator matrix for the MDS code. The code is formed by reducing, in the generator matrix to the extent possible, the size of the finite field to which entries belongin some cases to the base field having only two elements. In this way, unlike codes known in the art, the generator matrix has more than one column whose entries each take values in the finite field having two elements. In some cases, the generator matrix has a column whose entries each take values in one or more intermediate fields between the finite field having two elements and the encoding field.