Patent classifications
H04J3/0644
TIME SYNCHRONIZATION METHOD AND APPARATUS FOR DOMAIN CONTROLLER, DOMAIN CONTROLLER AND STORAGR MEDIUM
A time synchronization method, apparatus, domain controller, and storage medium are disclosed. The domain controller is mounted in a vehicle and includes a number of SoCs and micro control units. The SoCs and micro control units are respectively, communicatively connected through the controller area network bus and respectively connected to the switch via Ethernet. The switch has external Ethernet interfaces. A main SoC in the number of SoCs has external UART/PPS interfaces and the micro control units have external FlexRay interfaces. The time synchronization method of the domain controller includes any one of the steps of receiving a time service from an external device through the UART/PPS interfaces, receiving a time service from the external device through the switch over the Ethernet interface, or receiving a time service from the external device through the FlexRay interface under a normal operation phase of the vehicle.
TIME SYNCHRONIZATION IN PASSIVE OPTICAL NETWORKS
This technology allows time synchronization in passive optical networks (“PON”). A first Ethernet device timestamps and transmits a packet to a second Ethernet device via the PON. The first Ethernet device transmits the packet to a small form-factor pluggable (“SFP”) device within the PON and connected to the first Ethernet device. The SFP device determines a transmission time to a second SFP device and modifies a correction field (“CF”) of the packet by subtracting an ingress time and the transmission time from the CF. The packet is transmitted to the second SFP device, which modifies the CF by the addition of an egress time. The modified CF value represents the real-time transmission delay incurred in the SFP devices. The packet is transmitted to a second Ethernet device to synchronize a clock using the timestamp and the CF value in accordance with the PTP/IEEE-1588 standard.
Detecting time delay between circuits to achieve time synchronization
Systems, circuits, and methods for synchronizing devices in the time-domain are provided. A method, according to one implementation, includes determining a round-trip number based on a width of one cycle of a timestamping clock signal. The round-trip number is equal to a plurality of times that a clock signal is to be transmitted in a loop from a timing-leader component to a timing-follower component and back to the timing-leader component. The method also includes utilizing the timestamping clock signal to detect a cumulative time delay that results when the clock signal is transmitted in the loop a number of times equal to the round-trip number. The cumulative time delay is configured to enable synchronization of the timing-follower component with the timing-leader component.
Synchronizing playback by media playback devices
Example systems, apparatus, and methods receive audio information including a plurality of frames from a source device, wherein each frame of the plurality of frames includes one or more audio samples and a time stamp indicating when to play the one or more audio samples of the respective frame. In an example, the time stamp is updated for each of the plurality of frames using a time differential value determined between clock information received from the source device and clock information associated with the device. The updated time stamp is stored for each of the plurality of frames, and the audio information is output based on the plurality of frames and associated updated time stamps. A number of samples per frame to be output is adjusted based on a comparison between the updated time stamp for the frame and a predicted time value for play back of the frame.
FACILITATING TIME SYNCHRONIZATION FUNCTIONALITY AT USER EQUIPMENT
Apparatus, methods, and computer-readable media for facilitating time synchronization functionality at user equipment are disclosed herein. An example method for wireless communication at a first device includes transmitting, to a second device, capability information indicating that the first device is capable of operating as a PTP grand master clock. The example method also includes receiving, from the second device, one or more PTP parameters based on the capability information indicating that the first device is capable of operating as a PTP grand master clock. Additionally, the example method includes generating, based on the one or more PTP parameters received from the second device, a first PTP message including time information. Further, the example method includes transmitting the first PTP message including the time information to one or more downstream devices in communication with the first device.
Timestamp confidence level
In one embodiment, an event processing system includes a clock configured to provide time values, and event processing circuitry, which is configured to generate a confidence level indicative of a degree of confidence of an accuracy of a timestamp, the timestamp being generated for an event responsively to a time value indicative of when an operation associated with the event occurred.
Synchronization apparatus, synchronization system, radio communication apparatus and synchronization method
A synchronization apparatus capable of reducing the effect of the fluctuations in synchronization signals that are caused when the synchronization signals are received through a network are provided. A synchronization apparatus (20) according to the present invention receives a synchronization signal transmitted from a synchronization signal source (10) through a network. The synchronization apparatus (20) includes a frequency synchronization unit (21) that performs frequency synchronization based on a received synchronization signal, and outputs a frequency synchronization signal, a phase synchronization unit (23) that performs phase synchronization based on a synchronization signal transmitted from the synchronization signal source (10) through a network, and outputs a phase synchronization signal, and a phase synchronization control unit (22) that generates an offset value by using a phase difference between the frequency synchronization signal and the phase synchronization signal, and corrects a phase of the frequency synchronization signal by using the offset value.
Multi-interface GPS time synchronization
A time synchronizer receives UTC (Coordinated Universal Time) time in serial+PPS (Pulse Per Second) format from a GPS (Global Positioning System) device and outputs timestamp data in multiple formats, including: CAN (Controller Area Network), Ethernet, gPTP (generic Precision Time Protocol), and serial+PPS. Multiple data sources receive timestamp data in the multiple formats and each provide data in a unified UTC time base to a sensor-fusion device. The unified UTC time base is based on the timestamp data in the multiple formats output by the time synchronizer. The time synchronizer may perform edge detection for a first transition of an internal clock signal following a transition of the PPS signal received from the GPS device. The internal clock signal may be asynchronous with the PPS signal received from the GPS device. The internal clock signal may have a frequency of 40 MHz.
SYSTEMS AND METHODS FOR SYNCHRONIZING TRANSMISSION OF WIRELESS DATA
An audio system, method, and computer program product for synchronizing device clocks. The systems, methods and computer program product can establish a first isochronous data stream between a peripheral device and a first device and establish a second isochronous data stream between the first device and a second device to send data between the first and second device. As the two data streams may rely on two different device clocks, e.g., one clock which defines the timing for the first isochronous data stream and a second clock which defines the timing for the second isochronous data stream, the systems, methods, and computer program disclosed herein are configured to maintain synchronization and/or synchronize the first clock with the second clock to prevent data loss due to clock drift.
SECURED CLOCK SYNCHRONIZATION IN A PACKET-COMPATIBLE NETWORK
There is provided a technique of securing clock synchronization between master clock node (MCN) and client clock node (CCN). During a cycle of exchanging PTP messages between MCN and CCN, MCN generates an associated paired message for each PTP message generated thereby and informative of t.sub.1 or t.sub.4 timestamps provided by MCN and sends each paired message to a validation entity (VE) via a secured channel between MCN and VE. When PTP messages traverse transparent clock nodes (TCN) between MCN and CCN, each TCN generates a paired message for each version of PTP message updated thereby and sends each generated paired message to VE via a secured channel between respective TCN and VE. VE uses the received paired messages to provide a validation of the cycle, wherein synchronization-related task(s) (e.g. clock correction by the client clock node, etc.) are provided only subject to successful validation of the cycle by VE.