In one embodiment, a method receives a first time from a network device. The first time is derived from a first timing source in a first domain. The method receives a second time in a second domain from a second timing source. A difference time value is calculated between the first time and the second time. The method then sends the difference time value to the network device where the network device uses the difference time value to send a delay value to other computing devices to synchronize timing of the other computing devices in the second domain. The other computing devices are configured to synchronize the respective time using the delay value with mobile network devices to allow timing synchronization between the mobile network devices.

A small cell synchronization system uses multiple synchronization sources to obtain maximum performance and stability by utilizing all of the plurality of synchronization sources in a multiple small cell system having two or more different mobile communication small cells as one system and a control method thereof. The small cell synchronization system includes: an oscillator providing a system clock signal of a predetermined frequency; and a synchronization management module that collectively manages multiple synchronization sources, and determines the ‘synchronized PPS’ according to a result of comparing the ‘synchronized PPS’ with the PPS for each synchronization source using the system clock and provides it to each small cell along with the system clock.

A communication system comprises a clock generator configured to generate a plurality of system clock signals used to synchronize components included in each of communication nodes in the communication system based on an external clock signal provided by an external clock source located outside the communication system and a physical layer configured to transmit any one of the generated system clock signals to a small cell communicatively connected to an end communication node of the communication system.

In general, various aspects of the techniques described in this disclosure provide time synchronization for encrypted traffic in a computer network. In one example, the disclosure describes an apparatus, such as a network device, having a control unit for a network device in a computerized network having a topology of network devices; and a forwarding unit operative to determine a release time for sending a synchronization packet in accordance with a time synchronization protocol; modify the synchronization packet to include a release timestamp specifying the release time; sending a time value via sideband data associated with the synchronization packet, wherein the time value is based on the release time specified by the release timestamp; and schedule transmission of the synchronization packet for a time corresponding to the time value in the sideband data, the synchronization packet to be transmitted to a destination network device.

A system includes a first module with a first clock; a second module with a second clock; and an Ethernet network interconnecting the first module and the second module by N Ethernet paths, N≥2; wherein the first module is configured to provide timestamps encapsulated in replicated Ethernet packets to the second module over each of the N Ethernet paths for redundancy. The first module can be configured to obtain timestamps from a first clock with each timestamp having a sequence identifier, replicate each timestamp and its sequence identifier, and encapsulate each replicated timestamp and its sequence identifier in an Ethernet packet and transmit each Ethernet packet over one of the N Ethernet paths. The second module can be configured to receive Ethernet packets over the N Ethernet paths; and utilize a first Ethernet packet with a given sequence identifier for synchronization of the second clock with the first clock.

A method for switching clock sources is provided. In the method, Precision Time Protocol, PTP, packets are monitored using each of PTP ports which connect to a new grandmaster (401). A frequency and a phase for the PTP port are calculated based on the PTP packets (402). In response to a successful check for the frequency and the phase, the PTP port is added to a candidate list (403). A phase calibration and a phase stability check may be introduced prior to the alternate BMCA.

A method for selecting a clock source includes a first network device that obtains synchronization offset data between the first network device and a second network device through a first port in a clock synchronization failed state. The first network device determines, based on the synchronization offset data, whether to refer to, during clock source selection, clock information received by the first port.

This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.

A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, a clock generator circuit, a clock and data recovery (CDR) circuit, and a clock multiplexer circuit. The RX circuit receives an input data to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data. The clock generator circuit generates an output clock. The CDR circuit generates an RX recovered clock according to the RX data. The clock multiplexer circuit receives the output clock and the RX recovered clock, and outputs the TX clock that is selected from the output clock and the RX recovered clock.

This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.