H04L2025/03356

C-PHY TRAINING PATTERN FOR ADAPTIVE EQUALIZATION, ADAPTIVE EDGE TRACKING AND DELAY CALIBRATION
20180062883 · 2018-03-01 ·

Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method of calibration includes configuring a 3-phase signal to include a high frequency component and a low frequency component during a calibration period, and transmitting a version of the 3-phase signal on each wire of a 3-wire interface. The version of the 3-phase signal transmitted on each wire is out-of-phase with the versions of the 3-phase signal transmitted on each of the other wires of the 3-wire interface. The 3-phase signal may be configured to enable a receiver to determine certain operating parameters of the 3-wire interface.

DIGITAL MULTI-BAND PREDISTORTION LINEARIZER WITH NON-LINEAR SUBSAMPLING ALGORITHM IN THE FEEDBACK LOOP

A concurrent multi-band linearized transmitter (CMLT) has a concurrent d a multi-band predistortion block (CDMPB) and a concurrent multi-band transmitter (CMT) connected to the CDMPB, The CDMPB can have a plurality of digital baseband signal predistorter blocks (DBSPBs), an analyzing and modeling (A&M) stage, and a signal observation feedback loop. Each DBSPB can have a plurality of inputs, each corresponding to a single frequency band of the multi-band input signal, and its output corresponding to a single frequency band; each output connect corresponding to an input of the CMLT. The A&M stage can have a plurality of outputs connected to and updating the parameters of the DBSPBs, and a plurality of inputs connected to either both outputs of the signal observation loop or the output of the subsampling loop and to outputs of the DBSPBs. The A&M stage can perform signals' time alignment, reconstruction of signals and compute parameters of DBSPBs.

Methods and circuits for asymmetric distribution of channel equalization between devices

A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.

High-speed signaling systems and methods with adaptable, continuous-time equalization

A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.

Wireless receiver for turbo loop multiuser detection incorporating reuse of QR component

An improved receiver design implements a method for modeling users in SIC turbo loop multiuser detection architectures that reduces the number of implementation cycles, and thereby reduces the computational overhead associated with computing the inverse of the received signal covariance matrix, by efficiently reusing components of a QR decomposition. By reusing some of the computational results from the previous turbo loop's equalizer calculation, the disclosed receiver significantly reduces the computational burden of updating the linear equalizer on each turbo loop. Depending on the embodiment, this reduction can be accomplished in at least two different ways, depending on the dimensionality and other aspects of the implementation.

COMMUNICATION APPARATUS FOR INCREASING COMMUNICATION SPEEDS, SPECTRAL EFFICIENCY AND ENABLING OTHER BENEFITS
20170207939 · 2017-07-20 · ·

A communication apparatus has a receiver that is capable of receiving an alternating phase signal and a tuned circuit whose input is adjusted to be capable of receiving the alternating phase signal. The communication apparatus can be used with both wireless and wired communication links and provide enable faster data rates, greater immunity to noise, increased bandwidth/spectrum efficiency and/or other benefits. Applications include but are not limited to: cell phones, smartphones (e.g., iPhone, BlackBerry, etc.), wireless Internet, local area networks (e.g., WiFi type applications), wide area networks (e.g., WiMAX type applications), personal digital assistants, computers, Internet service providers and communications satellites.

Apparatus and method for accounting for gain and phase error introduced by a first filter by adjusting coefficients of a second filter
09641359 · 2017-05-02 · ·

A system including first and second filters and an adaptation engine. The first filter includes first taps that receive first coefficients and filters a digital signal to generate a first filtered signal. One of the first coefficients is constrained, such that the one of the first coefficients are not updated and phase and gain errors are introduced. The second filter includes second taps that receive second coefficients and filters the first filtered signal to generate a second filtered signal. The second coefficients include first and second coefficients. The adaptation engine, based on the one of the first coefficients, updates: the first coefficient to set a phase of the second filter; and the second coefficient to set a gain of the second filter. The phase of the second filter corresponds to a change in the phase error. The gain of the second filter corresponds to a change in the gain error.

Digital multi-band predistortion linearizer with nonlinear subsampling algorithm in the feedback loop

A concurrent multi-band linearized transmitter (CMLT) has a concurrent digital multi-band predistortion block (CDMPB) and a concurrent multi-band transmitter (CMT) connected to the CDMPB. The CDMPB can have a plurality of digital baseband signal predistorter blocks (DBSPBs), an analyzing and modeling (A&M) stage, and a signal observation feedback loop. Each DBSPB can have a plurality of inputs, each corresponding to a single frequency band of the multi-band input signal, and its output corresponding to a single frequency band; each output connect corresponding to an input of the CMLT. The A&M stage can have a plurality of outputs connected to and updating the parameters of the DBSPBs, and a plurality of inputs connected to either both outputs of the signal observation loop or the output of the subsampling loop and to outputs of the DBSPBs. The A&M stage can perform signals' time alignment, reconstruction of signals and compute parameters of DBSPBs.

Alternating phase filter for increasing communication speeds, spectral efficiency and enabling other benefits
09614696 · 2017-04-04 · ·

Common wave and sideband mitigation communication systems and methods are provided that can be used with both wireless and wired communication links. The systems and methods provided can enable faster data rates, greater immunity to noise, increased bandwidth/spectrum efficiency and/or other benefits. Applications include but are not limited to: cell phones, smartphones (e.g., iPhone, BlackBerry, etc.), wireless Internet, local area networks (e.g., WiFi type applications), wide area networks (e.g., WiMAX type applications), personal digital assistants, computers, Internet service providers and communications satellites.

METHODS AND CIRCUITS FOR ASYMMETRIC DISTRIBUTION OF CHANNEL EQUALIZATION BETWEEN DEVICES

A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.