This application relates to an encoding method and apparatus, and a display apparatus. The encoding method includes encoding 8-bit data corresponding to a to-be-encoded byte of to-be-transmitted data into alternative 10-bit data, the to-be-transmitted data including at least one to-be-encoded byte, detecting whether the first-digit data of the alternative 10-bit data is the same as the previous-digit data adjacent to the first-digit data, when the to-be-encoded byte is not the first byte of the to-be-transmitted data, inverting the alternative 10-bit data to obtain target 10-bit data, when the numerical value of the first-digit data is the same as that of the previous-digit data, and determining the alternative 10-bit data as the target 10-bit data, when the numerical value of the first-digit data is different from that of the previous-digit data. The 8-bit data, the alternative 10-bit data and the target 10-bit data are binary data.

Encoders and decoders for encoding and decoding data according to a coding scheme. The encoder converts N bits of input data into M voltage signals for transmission over M parallel wires to a decoder having one or two decoding stages that recover the N bits of data from the M voltage signals. The coding scheme is an N-bit, M-wire PAM-Q code in which each voltage signal w.sub.i has one of Q voltage levels I.sub.1-I.sub.Q, where I.sub.1<I.sub.2< . . . <I.sub.Q, and the different sets of M voltage signals for the different N-bit input values are permutations of a single set of M voltage signals. The decoder has a comparator stage. For the decoder having one other decoding stage, the other decoding stage is a computation stage or a logic stage that is before or after the comparator stage.

A circuit includes a buffer configured to receive a first Flexible Ethernet (FlexE) frame having 66b blocks including 66b overhead blocks and 66b data blocks, wherein the buffer is configured to accumulate the 66b overhead blocks and the 66b data blocks; a mapping circuit configured to map four x 66b overhead blocks from the buffer into a 257b overhead block and to map a sequence of four x 66b data blocks from the buffer into a 257b data block; and a transmit circuit configured to transmit a second FlexE frame having 257b blocks from the mapping circuit. The mapping circuit can be configured to accumulate four 66b blocks of a same kind from the buffer for mapping into a 257b block, where the same kind is one of overhead and a particular calendar slot n where n=0-19.

Encoders and decoders for encoding and decoding data according to a coding scheme. The encoder converts N bits of input data into M voltage signals for transmission over M parallel wires to a decoder having one or two decoding stages that recover the N bits of data from the M voltage signals. The coding scheme is an N-bit, M-wire PAM-Q code in which each voltage signal w.sub.i has one of Q voltage levels l.sub.1-l.sub.Q, where l.sub.1<l.sub.2< . . . <l.sub.Q, and the different sets of M voltage signals for the different N-bit input values are permutations of a single set of M voltage signals. The decoder has a comparator stage. For the decoder having one other decoding stage, the other decoding stage is a computation stage or a logic stage that is before or after the comparator stage.

This application relates to an encoding method and apparatus, and a display apparatus. The encoding method includes encoding 8-bit data corresponding to a to-be-encoded byte of to-be-transmitted data into alternative 10-bit data, the to-be-transmitted data including at least one to-be-encoded byte, detecting whether the first-digit data of the alternative 10-bit data is the same as the previous-digit data adjacent to the first-digit data, when the to-be-encoded byte is not the first byte of the to-be-transmitted data, inverting the alternative 10-bit data to obtain target 10-bit data, when the numerical value of the first-digit data is the same as that of the previous-digit data, and determining the alternative 10-bit data as the target 10-bit data, when the numerical value of the first-digit data is different from that of the previous-digit data. The 8-bit data, the alternative 10-bit data and the target 10-bit data are binary data.

Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves including a frame boundary bit sequence and a random data sequence as a preamble of a bit stream, encoding the bit stream into an encoded bit stream, and transmitting the encoded bit stream using the wired communications device.

Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves performing a bit mapping operation on an input bit stream to generate a mapped bit stream, performing a bit scrambling operation in response to the mapped bit stream to generate a scrambled bit stream, generating an encoded bit stream in response to the scrambled bit stream, and transmitting the encoded bit stream using the wired communications device.

A transmitter includes a data stream encoder layer having an output and a pattern generator having a bit pattern output. The transmitter further includes a first multiplexer having first and second inputs and a first multiplexer output. The first input is coupled to the output of the data stream encoder layer, and the second input is coupled to the bit pattern output of the pattern generator. While at least a portion of the data stream encoder layer is powered down, the pattern generator is configured to provide bit patterns on its bit pattern output, a control signal to the first multiplexer is configured to select the second input of the first multiplexer, and the first multiplexer is configured to output the bit patterns on the output of the first multiplexer.

A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.

A binary encoder includes an input configured to receive a binary signal, an encoding processor configured to compute a plurality of different variations of the binary signal, combine each of the different variations with a different redundancy sequence to create a plurality of optional output binary sequences, and select one of the optional output binary sequences according to a binary digit prevalence, and an output configured to output the selected binary sequence. A decoder configured to identify a redundancy sequence of a received binary signal to select a transformation function according to the redundancy sequence and to convert the binary signal according to the transformation function.