H04L25/4923

Transmission device, reception device, and communication system

A transmission device of the disclosure includes: a generator unit that generates, on the basis of a control signal, a transmission symbol signal that indicates a sequence of transmission symbols; an output control unit that generates an output control signal on the basis of the transmission symbol signal; and a driver unit that generates, on the basis of the output control signal, a first output signal, a second output signal, and a third output signal. The generator unit generates the transmission symbol signal on the basis of the control signal, to allow the first output signal, the second output signal, and the third output signal to exchange signal patterns with one another.

Apparatuses and methods for encoding and decoding of signal lines for multi-level communication architectures
11809715 · 2023-11-07 ·

Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

CONNECTION DEVICE, ELECTRONIC DEVICE, AND INFORMATION PROCESSING METHOD

It is made possible to favorably perform signal transfer between a plurality of daisy-chain-connected devices. There is a communication line for performing communication between a first electronic device and a second electronic device. A data generating section generates first data to be transmitted to the first electronic device. Then, a data input section inputs the first data to a first position on the communication line. In addition, a first data suppressing section is provided at a second position on the communication line, the second position being closer to the second electronic device than the first position is, and the first data suppressing section prevents the first data from being sent to the second electronic device.

Signal receiving device and method of recovering clock and calibration of the device

A signal receiving device may not need to consider jitter characteristics of a received signal by including a transition detecting device which receives first to third input signals having different signal levels for each unit interval, compares whether a signal level of a first differential signal, which is a differential signal between the first input signal and the second input signal among the first to third input signals, is greater than a first reference signal level to output a first comparison signal, and compares whether the signal level of the first differential signal is greater than a second reference signal level different from the first reference signal level to output a second comparison signal, and a clock data recovering device which recovers a clock signal embedded in the first to third input signals on the basis of the first and second comparison signals to output the recovery clock signal.

Apparatuses and methods for encoding and decoding of signal lines for multi-level communication architectures
11106367 · 2021-08-31 · ·

Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

APPARATUSES AND METHODS FOR ENCODING AND DECODING OF SIGNAL LINES FOR MULTI-LEVEL COMMUNICATION ARCHITECTURES
20210240357 · 2021-08-05 · ·

Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Transmitter for cancelling simultaneous switching noise and data transmission method in the same

Disclosed are a transmitter capable of cancelling simultaneous switching noise while ensuring low costs and a small area and a data transmission method in the same. The transmitter includes an encoder configured to convert input data of two levels (1 and 0) into data of three levels (+1, 0, and −1) and an output unit configured to output the data converted by the encoder. Here, the encoder adds 1 bit to the input data such that the number of bits corresponding to logic 1 becomes an even number. In addition, a specific correlation is established between currents or voltages corresponding to at least two levels of levels “+1”, “0”, and “−1” so that “+1” and “−1” corresponding to the logic 1 are alternately arranged and a current flowing through a power line or a ground line is constant regardless of the input data.

DATA TRANSMISSION DEVICES WITH EFFICIENT TERNARY-BASED DATA TRANSMISSION CAPABILITY AND METHODS OF OPERATING SAME
20210135910 · 2021-05-06 ·

A data transmission device includes first and second lines, and a transmitter configured to convert received binary data into ternary data and output the ternary data onto the first and second lines by toggling only one of the first and second lines during each of a plurality of consecutive 2-bit data transmission time intervals. A receiver is also provided, which is configured to receive the ternary data from the first and second lines and convert the received ternary data into binary data. The transmitter is configured to output the ternary data onto the first and second lines using return-to-zero toggling during each of the 2-bit data transmission time intervals.

Data transmission devices with efficient ternary-based data transmission capability and methods of operating same
10985954 · 2021-04-20 · ·

A data transmission device includes first and second lines, and a transmitter configured to convert received binary data into ternary data and output the ternary data onto the first and second lines by toggling only one of the first and second lines during each of a plurality of consecutive 2-bit data transmission time intervals. A receiver is also provided, which is configured to receive the ternary data from the first and second lines and convert the received ternary data into binary data. The transmitter is configured to output the ternary data onto the first and second lines using return-to-zero toggling during each of the 2-bit data transmission time intervals.

SIGNAL RECEIVING DEVICE AND METHOD OF RECOVERING CLOCK AND CALIBRATION OF THE DEVICE

A signal receiving device may not need to consider jitter characteristics of a received signal by including a transition detecting device which receives first to third input signals having different signal levels for each unit interval, compares whether a signal level of a first differential signal, which is a differential signal between the first input signal and the second input signal among the first to third input signals, is greater than a first reference signal level to output a first comparison signal, and compares whether the signal level of the first differential signal is greater than a second reference signal level different from the first reference signal level to output a second comparison signal, and a clock data recovering device which recovers a clock signal embedded in the first to third input signals on the basis of the first and second comparison signals to output the recovery clock signal.