The present invention provides a control method applied to an electronic device is disclosed, wherein the electronic device includes a processor and a wireless network module, and the control method includes the steps of: generating a determination result by determining if the wireless network module needs to transmit a packet; and when the determination result indicates that the wireless network module needs to transmit the packet, reducing a frequency of a clock signal used by the processor during a packet transmission.

A low power wake on radio circuit detects if an RF signal is present on an input to the wake on radio circuit. An RF sense circuit supplies an RF sense signal indicating whether the RF signal is present on the input. The RF sense signal is used to incrementally turn on digital decode logic to determine if a radio transmission that is unique to the wake on radio circuit has been received. If the unique radio transmission have been received, the wake on radio circuit supplies a wakeup signal to the rest of the system.

A communications processor is operative in a plurality of modes including at least a high performance mode, a power savings mode with lower computational capability, and a shutdown mode with a wakeup capability. A memory for the communications processor has a high speed segment and a low speed segment, the high speed segment and low speed segment respectively on a high speed data bus and a low speed data bus, the high speed data bus and low speed data bus coupled by a bidirectional bridge.

An electronic device includes an appended module coupled to a core having a standby state comprising a first power supply circuit, a first clock and a circuit that recognizes multiple vocal commands timed by the first clock. The appended module includes a second power supply circuit independent of the first power supply circuit, a second clock independent of the first clock and having a frequency lower than that of the first clock, digital unit timed by the second clock including a sound capture circuit that delivers a processed sound signal, and a processing unit configured in order, in the presence of a parameter of the processed sound signal greater than a threshold, to analyze the content of the processed sound signal and to deliver, when the content of the sound signal comprises a reference pattern, an activating signal to the core that can take it out of its standby state.

Methods, systems, and devices for wireless communication are described. An access point (AP) may identify a jitter pattern for a wakeup message. A station may listen using a wakeup radio for a wakeup message during wakeup listening periods according to the identified jitter pattern. A station may receive a preamble having a first bandwidth and a wakeup message having a second bandwidth. An AP may transmit an identifier key to a station, and the station may determine a rotating identifier associated with the AP based on the received identifier key. The station may receive a wakeup message from the AP, compare a sender identifier with the rotating identifier, and power on a second radio. A station may also receive a wakeup message that includes an indication of which station are to be activated.

A low power wake on radio circuit detects if an RF signal is present on an input to the wake on radio circuit. An RF sense circuit supplies an RF sense signal indicating whether the RF signal is present on the input. The RF sense signal is used to incrementally turn on digital decode logic to determine if a radio transmission that is unique to the wake on radio circuit has been received. If the unique radio transmission have been received, the wake on radio circuit supplies a wakeup signal to the rest of the system.

A terminal state indicating method, a terminal state determining method, a base station and a terminal are provided. The terminal state indicating method includes: transmitting a subsequence in a predetermined subsequence set, the predetermined subsequence set includes at least one subsequence, each of the at least one subsequence is configured to indicate that at least two terminals are in a target state, and the target state includes a wake-up state or a sleep state.

A circuit system comprises a processor, a first clock with a first frequency, a second clock with a second frequency, such second frequency being higher than said first frequency and a clock calibration module. The clock calibration module comprises a plurality of counters configured to count cycles of the second clock when triggered. Each of the plurality of counters is configured to be triggered at successive cycles of the first clock. Each of the plurality of counters is configured, after a predetermined number of cycles of the first clock, to output a count of elapsed second clock cycles and the processor is configured to determine, using the counts outputted by the plurality of counters, a ratio between the first frequency and the second frequency.

Disclosed herein are techniques to enable remote discovery of connectivity capabilities and remote connection of devices in a power efficient manner. In particular, discovery and connection requests for connectivity capabilities utilizing a first radio may be communicated using a second radio, the second radio utilizing a lower amount of power relative to the first radio. For example, connectivity capabilities such as Wi-Fi, Wi-Fi Direct, WiGig, Zigbee can be discovered and connection request communicated using a Bluetooth radio.

A communications system and method provides power-saving while maintaining required protocol timing resolution. In a communication system that requires a high-frequency, high-precision, but high-power, clock source to meet timing requirements, selective disablement and re-enablement of the high-frequency clock provides for both timing precision and power reduction in the system.