An electronic apparatus comprises a semiconductor device and a mounting substrate. The semiconductor device includes a semiconductor chip and a wiring circuit board. The chip includes a circuit blocks and first electrode pads. The wiring circuit board includes a first surface and a second surface. The first surface includes second electrode pads wirings. The second surface includes ball electrodes. A first wiring supplies a ground potential to a first circuit block. A second wiring supplies a ground potential to a second circuit block. The second surface includes a first extension pad and a second extension pad. The first extension pad and the second extension pad are disposed at positions at which they are connected to each other on the second surface side through a single ball electrode.

A multi-layer printed circuit board having a first landing pad in a first layer and along a first axis arranged to receive a positive signal and a second landing pad in the first layer and along a second axis that is spaced away from the first axis longitudinally in the first layer and where the second landing pad arranged to receive a negative signal. A first buried in a second layer and along the first axis is spaced away from the first landing pad along the first axis. A second buried in the second layer and along the second axis is spaced away from the second landing pad along the second axis. A first signal connector provides a first electrical connection between the first landing pad and the second buried via and a second signal connector provides a second electrical connection between the second landing pad and the first buried via.

The disclosure provides for methods of making electrically conductive apparatus, such as circuit boards. The methods include 3D-printing a ceramic material into a ceramic substrate that includes a void. A conductive material is infused into the void. The conductive materiel forms electrically conductive connections within the apparatus. Also disclosed are apparatus formed by the methods.

A method for manufacturing a circuit board embeds a portion of an outer circuit layer in an outer dielectric layer which increases contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the finished circuit board.

Aspects of the invention include a press-fit pin for mechanically and electrically connecting to a through-hole of a substrate. The press-fit pin can include a press-fit portion configured to be deformed upon insertion into the through-hole against a plated surface of the through-hole. A surface mount technology (SMT) pad can be coupled to a first end of the press-fit portion. The SMT pad can include a conductive material. The press-fit pin can further include a trace extension coupled to the SMT pad. The trace extension can extend from the SMT pad in a direction perpendicular to the press-fit portion. The press-fit pin can include a tip portion coupled to a second end of the press-fit portion.

Various exemplary embodiments relate to a printed circuit board (PCB) for electrically connecting a discrete array component including a pattern formed on the PCB which is a merger of a set of via pads and a discrete array component; wherein the pattern is generated by a pin mapping between the discrete array component and a via grid array on the PCB; and wherein the pattern is formed of a metal etched during a manufacturing process of the PCB.

A circuit board and package assembly electrically connecting a die to a circuit board. The circuit board has signal paths terminating in a signal pad located on an insulating layer. The circuit board also includes a ground pad on the insulating layer that has a concave shaped side forming a recess, the with a signal pad at least partially within the recess. A package has package ground pads aligned with the circuit board ground pads and package signal pads aligned with circuit board signal pads. The package ground pads extend through the package to connect to package ground paths, which extend toward the die. The package signal pads extend through the package to connect to package signal paths and the package signal paths extend toward the die, maintaining a consistent distance from the package ground paths. Multiple-tier bond wires connect the package bond locations to the die bond pads.

A circuit board includes an inner circuit substrate and an outer circuit substrate electrically connected to the inner circuit substrate. The outer circuit substrate includes an outer dielectric layer and an outer circuit layer facing the inner circuit substrate embedded in the outer dielectric layer. A portion of the outer circuit layer facing away from the inner circuit substrate protruding from the outer dielectric layer. The circuit board can increase contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the circuit board.

Apparatus having at least one breakout structure are provided. In one example, an apparatus includes a dielectric layer, first and second contact pads, and first and second vias. The first and second contact pads are disposed on the dielectric layer. The first via is disposed through the dielectric layer and coupled to the first contact pad. The first via is offset from the first contact pad in a first direction. The second contact pad is immediately adjacent the first via. The second via is disposed through the dielectric layer immediately adjacent the first contact pad and coupled to the second contact pad. The second via is offset from the second contact pad in a second direction that is opposite of the first direction. The first and the second contact pads define a first differential pair of contact pads that is configured to transmit a first differential pair of signals.

A method reduces an area of a mounting electrode provided on a first surface of a multilayer body and connected to a specific component is reduced and decreases a pitch between mounting electrodes. A plating film is formed on the mounting electrodes with the reduced area. The mounting electrodes for connection to specific components are defined by first end surfaces of first via conductors, and hence, the areas of the mounting electrodes are significantly reduced, and the pitch between the mounting electrodes is significantly decreased. Also, the mounting electrodes defined by the first end surfaces of the first via conductors are connected to plane electrodes at end surfaces of second via conductors exposed from a surface of the multilayer body with internal wiring electrodes interposed therebetween. Thus, a plating film is able to be reliably provided on the mounting electrodes.