Patent classifications
H05K3/185
Laser-seeding for electro-conductive plating
A workpiece (100) having substrate, such as a glass substrate, can be etched by a laser or by other means to create recessed features (200, 202). A laser-induced forward transfer (LIFT) process or metal oxide printing process can be employed to impart a seed material (402), such as a metal, onto the glass substrate, especially into the recessed features (200, 202). The seeded recessed features can be plated, if desired, by conventional techniques, such as electroless plating, to provide conductive features (500) with predictable and better electrical properties. The workpieces (100) can be connected in a stacked such that subsequently stacked workpieces (100) can be modified in place.
SYSTEMS AND METHODS FOR MANUFACTURING
Various inventions are disclosed in the microchip manufacturing arts. Conductive pattern formation by semi-additive processes are disclosed. Further conductive patterns and methods using activated precursors are also disclosed. Aluminum laminated surfaces and methods of circuit formation therefrom are further disclosed. Circuits formed on an aluminum heat sink are also disclosed. The inventive subject mater further discloses methods of electrolytic plating by controlling surface area of an anode.
Catalytic Laminate with Conductive Traces formed during Lamination
A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.
ELECTRONIC DEVICE HAVING A HOUSING WITH EMBEDDED ANTENNA
Electronic device having at least one main antenna (1) where such antenna is formed as a conductive layer on walls of a housing (10) of the electronic device through a laser direct structuring process and has a first portion (2, 3) on an internal part of the housing, a second portion (4) forming a junction area on an edge between an interior part and an exterior part of the housing and a third portion (5) on an outer part of the housing in electrical continuity with the first portion through the junction area.
CONDUCTIVE FILM, TOUCH PANEL SENSOR, AND TOUCH PANEL
The present invention provides a conductive film in which a change in the surface state is suppressed, a touch panel sensor, and a touch panel. The conductive film according to the present invention includes a substrate, a patterned layer to be plated which is arranged on at least one surface of the substrate and has a functional group interacting with a plating catalyst or a precursor thereof, a copper plating layer which is arranged so as to cover the patterned layer to be plated and is in contact with the substrate, and a protective layer which is arranged so as to cover the copper plating layer, in which the protective layer contains an alloy of copper and a metal that is electrochemically nobler than copper.
Process for forming traces on a catalytic laminate
A process for making a circuit board from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth includes drilling holes, etching the surface to expose the catalytic particles, electroless plating the unmasked areas, applying a mask to the etched surface, electroplating the exposed areas using the electroless plating to form a continuous conductor, then stripping the mask and etching away the electroless copper deposition.
Catalytic laminate with conductive traces formed during lamination
A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.
Metallization structure and manufacturing method thereof
Graphene oxide is used as an insulation barrier layer for metal deposition. After patterning and modification, the chemical characteristics of graphene oxide are induced. It can be used as the catalyst for electroless plating in the metallization process, so that the metal is only deposited on the patterned area. It provides the advantages of improving reliability and yield. The metallization structure includes a substrate, a graphene oxide catalytic layer, and a metal layer. It may be widely applied to the metallization of the fine pitch metal of a semiconductor package as well as the fine pitch wires of a printed circuit board (PCB), touch panels, displays, fine electrodes of solar cells, and so on.
METHOD FOR FORMING METALLIZATION STRUCTURE
Graphene oxide is used as an insulation barrier layer for metal deposition. After patterning and modification, the chemical characteristics of graphene oxide are induced. It can be used as the catalyst for electroless plating in the metallization process, so that the metal is only deposited on the patterned area. It provides the advantages of improving reliability and yield. The metallization structure includes a substrate, a graphene oxide catalytic layer, and a metal layer. It may be widely applied to the metallization of the fine pitch metal of a semiconductor package as well as the fine pitch wires of a printed circuit board (PCB), touch panels, displays, fine electrodes of solar cells, and so on.
MICRO POWER DISTRIBUTION BOXES AND METHODS OF MANUFACTURING SAME USING APPLICATION SPECIFIC ELECTRONICS PACKAGING TECHNIQUES
A micro power distribution box is provided which includes a device, a connector/housing and a cover. The device has a substrate, at least one first finger, at least one second finger, and at least one electrical component. The at least one first finger and the at least one second finger are electrically connected to one another. The at least one first finger has first, second and third portions. The at least one second finger has first and second portions. The substrate is overmolded to the first portions of the at least one first and second fingers. The substrate is not overmolded to the second portions of the at least one first and second fingers or to the third portion of the at least one first finger. The second portions of the at least one first and second fingers extend outwardly from the substrate. The second portion of the at least one first finger is a high current contact. The second portion of the at least one second finger is a contact pin. The third portion of the at least one first finger is exposed via an aperture provided through the substrate. The at least one electrical component is directly mounted to the third portion of the at least one first finger in order to electrically connect the at least one electrical component to the at least one first finger. The connector/housing is configured to house the device therein and is configured to be connected to a mating connector. The cover is configured to be secured to the connector/housing in a manner which prevents the device from being removed from the connector/housing.