Patent classifications
H05K3/185
SEMICONDUCTOR ASSEMBLY
An assembly is provided that includes a semiconductor device positioned on a frame and connected to electroplated traces via wire bonding. A connector can be integrated into the frame. Terminals can be molded into the frame. Traces can be connected to the terminals so as to provide a three-dimensional circuit.
Laminate structure of metal coating
A laminate structure of metal coating is laminated on a base material, and includes a primer layer, a catalyst layer and a plating deposited layer. The primer layer is a resin layer with a glass transition temperature (Tg) of 40 to 430 C. The catalyst layer is a metal nanoparticle group arranged in a plane on the primer layer, wherein the metal nanoparticle group is a metal in Group 11 or Groups 8, 9 and 10 in a periodic table, and the metal nanoparticles are surrounded by the primer layer. Ends of the metal nanoparticles are attached to the plating deposited layer.
Selective metallization of an integrated circuit (IC) substrate
Embodiments of the present disclosure describe selective metallization of an integrated circuit (IC) substrate. In one embodiment, an integrated circuit (IC) substrate may include a dielectric material and metal crystals having a polyhedral shape dispersed in the dielectric material and bonded with a ligand that is to ablate when exposed to laser light such that the metal crystals having the ablated ligand are activated to provide a catalyst for selective electroless deposition of a metal. Other embodiments may be described and/or claimed.
PATTERN DRAWING DEVICE, PATTERN DRAWING METHOD, AND METHOD FOR MANUFACTURING DEVICE
An exposure device that draws a pattern on a substrate by shining a beam from a light source device on substrate and scanning the beam in a main scanning direction while varying the intensity of beam according to pattern information, including: a scanning unit having a beam scanning unit that includes a polygonal mirror whereby the beam is oriented to scan the beam, and light detector for photoelectric detection of reflected light generated when beam is shined on substrate; an electro-optical element for controlling the beam's intensity modulation according to pattern information such that at least part of second pattern to be newly drawn is drawn on top of at least part of first pattern formed on substrate; and a measurement unit measuring relative positional relationship between the first and second pattern on the basis of a detection signal output by the detector while second pattern is drawn on substrate.
Carrier of one or more light-emitting diodes (LEDS) for a signaling module
A carrier of one or more light sources for a lighting and/or signaling module especially for an automotive vehicle, comprising: a substrate having at least one aperture and electrical tracks on at least one side; and at least one light-emitting diode (LED) having a body and electrical connection leads lateral to the body. The LED or at least one of the LEDs is placed through a respective aperture of the substrate, and the connection leads make contact with respective electrical tracks. The substrate is a rigid molded part having a three-dimensional shape possibly providing an optical function such as that of a reflector. In this case, the LEDs are directly supported by the optical part.
LAMINATE STRUCTURE OF METAL COATING
A laminate structure of metal coating is laminated on a base material, and includes a primer layer, a catalyst layer and a plating deposited layer. The primer layer is a resin layer with a glass transition temperature (Tg) of 40 to 430 C. The catalyst layer is a metal nanoparticle group arranged in a plane on the primer layer, wherein the metal nanoparticle group is a metal in Group 11 or Groups 8, 9 and 10 in a periodic table, and the metal nanoparticles are surrounded by the primer layer. Ends of the metal nanoparticles are attached to the plating deposited layer.
Component Carrier With Photosensitive Adhesion Promoter and Method of Manufacturing the Same
A component carrier which comprises a stack comprising at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, and a photosensitive adhesion promoter on or above the stack, wherein only a sub-portion of the photosensitive adhesion promoter is photoactivated, and electrically conductive material selectively on said sub-portion of the photosensitive adhesion promoter.
Circuit structure
A circuit structure that comprises a substrate and one or more conductive elements disposed on the substrate is provided. The substrate comprises a polymer composition that comprises an electrically conductive filler distributed within a polymer matrix. The polymer matrix contains at least one thermoplastic high performance polymer having a deflection under load of about 40? C. or more as determined in accordance with ISO 75-2:2013 at a load of 1.8 MPa, and the polymer composition exhibits a dielectric constant of about 4 or more and a dissipation factor of about 0.3 or less, as determined at a frequency of 2 GHz.
INTERCONNECT FRAMES FOR SIP MODULES
Frames and other structures for system-in-package modules that may allow components on boards in the modules to communicate with each other.
COMPOSITE CIRCUIT BOARD
A composite circuit board includes an insulation layer, an inner circuit layer, a first conductive layer and a second conductive layer embedded in the insulation layer, a third conductive layer and a fourth conductive layer formed on opposite surfaces of the insulation layer. The third conductive layer electrically connects with the first conductive layer. The fourth conductive layer electrically connects with the second conductive layer. The inner circuit layer is in a middle portion of the insulation layer. The first conductive layer and the second conductive layer respectively forms on opposite sides of the inner circuit layer. The insulation layer forms a plurality of first through holes between the first conductive layer and the inner circuit layer, a plurality of second through holes between the second conductive layer and the inner circuit layer.