A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.

An electrical apparatus that includes: an electronic substrate having a plurality of pads for connecting to an electronic component placed on the electronic substrate; a shield placed on a surface of the electronic substrate, the shield having a plurality of openings with the plurality of openings aligned over the plurality of pads and at least a portion of each of the plurality of openings being conductive; connection means to connect the conductive portions of each of the plurality of openings to a fault detect and error handling circuit; and the fault detect and error handling circuit to detect a short circuit between at least one of the conductive portions and the pad aligned with the opening containing the at least one of the conductive portions.

An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

A solder connection between a coaxial cable and a printed circuit board arrangement. The coaxial cable comprises an inner conductor, an outer conductor and a dielectric arranged in between. The printed circuit board arrangement comprises an outer conductor contact area and an inner conductor contact area. The outer conductor contact area comprises an outer conductor receiving opening. The coaxial cable runs at an angle to the printed circuit board arrangement, wherein a part of the outer conductor is arranged in the outer conductor receiving opening and wherein the inner conductor is arranged at the inner conductor contact area. A first solder joint connects the outer conductor to the outer conductor contact area. A second solder joint connects the inner conductor to the inner conductor contact area.

A printed circuit board module (10) has a printed circuit board (20) with a first side (21), a second side (22) and a contact hole (30). A sleeve-type via (32) is provided in the contact hole 30. An annular ring (35, 36) is associated with the via (32), on at least one side (33, 34). The annular ring (35, 36) is arranged on the first side (21) or on the second side (22) of the printed circuit board (20). The annular ring (35, 36) is electrically connected to the via (32). The annular ring (35, 36) has an annular ring edge (40), at least in sections. The printed circuit board module (10) has a solder resist layer (50). It extends, at least in sections, from outside the annular ring edge (40) over the annular ring edge (40) to an outer region (42) of the annular ring (35, 36). An inner region (44) not covered with the solder resist layer (50), remains on the annular ring (35, 36).

A multilayer circuit board includes a plurality of electrically conductive rear pads for termination of a plurality of wires and a plurality of electrically conductive front pads for insertion into a connector. A plurality of pairs of substantially parallel traces extend between and connect the front pads to the rear pads. At least a first pair of traces and the front and rear pads connected thereto are disposed in a same layer of the multilayer circuit board. At least a second pair of traces is disposed in a same layer, and the rear and front pads connected thereto are disposed in a different layer of the multilayer circuit board. At least a third pair of traces are disposed in different layers of the multilayer circuit board. For each trace extending between and connecting the front and rear pads corresponding to the trace, the trace comprises no more than two vias.

A method of making a component includes applying a clamping force to the component, the component coupled to a carrier strip of a panel via a polymeric tab and separating a portion of the polymeric tab from a substrate of the component, thereby causing the component to be detached from the panel.

A circuit board being able to easily ensure flatness of solder placed on a substrate for bonding an electronic component and improve bonding reliability of the electronic component by the solder, includes: a substrate having a plurality of layers made of a conductive material; a land provided on a first layer arranged on one side of the substrate, to which the electronic component is soldered; a heat sink provided on a different layer arranged on the substrate; a via hole provided on the substrate from a part of the land over to a part of the heat sink and electrically connected to the land and the heat sink; and an insulating resist disposed on the land and surrounding the entire circumference of the via hole.

A secondary detection system for integrating automated optical inspection and neural network and a method thereof are disclosed. In the secondary detection system, an automated optical inspection apparatus performs automated optical inspection for pin solder joints on circuit board, and when a detection result indicates abnormal condition, the secondary detection device calculates a detection image probability value based on the component image feature and the template image feature, and calculate pin solder joint image probability values based on the component pin solder joint image feature and the template pin solder joint image feature through siamese neural network, to obtain a minimum probability value among the detection image probability value and pin solder joint image probability values. The minimum probability value is used to determine whether to change the detection result, thereby providing accurate detection result of automated optical inspection and increasing a first pass yield.

An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.