According to certain aspects, devices and methods can be provided for forming packaging substrates having ringless vias. For instance, a method of forming one or more vias in a packaging substrate can include: laminating a plurality of layers of a packaging substrate; drilling a via hole through the plurality of layers using a through drill, the plurality of layers not including a capture pad or ring along a path of the through drill for drilling the via hole; and forming a via in the via hole using a plating process.

An information handling system includes a printed circuit board, a surface mount connector including first and second surface mount connector portions, first and second different pairs, and a ground plane. The first and second surface mount connector portions are mounted on the printed circuit board. The first differential pair is located on the first surface mount connector portion, and the second differential pair is located on the second surface mount connector portion. The ground plane is located in between the first and second surface mount connector portions within the printed circuit board. The first ground via is in physical communication with the ground plane and a first ground pad on a surface of the printed circuit board. The second ground via is in physical communication with the ground plane and a second ground pad on the surface of the printed circuit board.

A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and a metal layer on the seed layer, a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer, and a base layer formed on the resin insulating layer and including resin and one of iron and chromium in a range of 0.2 at % to 5.0 at % with respect to the resin such that the base layer includes part formed between the resin insulating layer and the seed layer.

A polymer film is applied onto a surface of a laminated printed circuit board subassembly having vias. Holes are created in the polymer film to access the vias while the polymer film remains covering adjacent areas. The polymer film with holes allows placement of hole-fill paste in the vias while preventing unwanted hole-fill paste placement or migration to adjacent areas. After filling the vias with hole-fill paste, the hole-fill paste is preferably at least partially hardened or cured, and the polymer film is preferably removed, facilitating further assembly of a printed circuit board without unwanted hole-fill paste in other areas which could be difficult to remove, The invention includes improved processes for fabricating printed circuit boards, and is particularly useful for irregular circuit boards and rigid flex circuit boards. The invention also includes covered laminated printed circuit board subassemblies, covered with a removable polymer film.

The method comprises providing a semiconductor substrate, which has a main surface and an opposite further main surface, arranging a contact pad above the further main surface, forming a through-substrate via from the main surface to the further main surface at a distance from the contact pad and, by the same method step together with the through-substrate via, forming a further through-substrate via above the contact pad, arranging a hollow metal via layer in the through-substrate via and, by the same method step together with the metal via layer, arranging a further metal via layer in the further through-substrate via, the further metal via layer contacting the contact pad, and removing a bottom portion of the metal via layer to form an optical via laterally surrounded by the metal via layer.

In a laminated coil component, patterned conductor portions of a first coil portion and patterned conductor portions of a second coil portion are provided on respective insulation layers adjacent in a lamination direction, and include portions that overlap with each other when viewed in plan view. The insulation layers on which the patterned conductor portions of the second coil portion are provided are laminated between the plurality of insulation layers on which the patterned conductor portions of the first coil portion are provided. A first outer electrode to which the first coil portion is electrically connected and a second outer electrode to which the second coil portion is electrically connected are provided on the same main surface of a multilayer body.

An information handling system includes a printed circuit board, a surface mount connector including first and second surface mount connector portions, first and second different pairs, and a ground plane. The first and second surface mount connector portions are mounted on the printed circuit board. The first differential pair is located on the first surface mount connector portion, and the second differential pair is located on the second surface mount connector portion. The ground plane is located in between the first and second surface mount connector portions within the printed circuit board. The first ground via is in physical communication with the ground plane and a first ground pad on a surface of the printed circuit board. The second ground via is in physical communication with the ground plane and a second ground pad on the surface of the printed circuit board.

A method for producing a printed circuit board is disclosed, In the method, a slot is formed in a substrate having at least three layers with the slot extending through at least two of the layers. The slot has a length and a width with the length being greater than the width. The sidewall of the substrate surrounding the slot is coated with a conductive layer. Then, the conductive layer is separated into at least two segments that are electrically isolated along the side wall of the substrate.

A circuit board according to an embodiment includes an insulating layer including a first via hole; a first via disposed in the first via hole of the insulating layer; wherein the first via includes: a first via part disposed in a first region of the first via hole; and a second via part disposed in a second region other than the first region of the first via hole; wherein the second region is a central region of the first via hole, and the first region is an outer region surrounding the second region; wherein the first via part and the second via part includes: a first surface in contact with each other; and a second surface other than the first surface exposed on the insulating layer; wherein the first surface has a first surface roughness; wherein the second surface has a second surface roughness different from the first surface roughness.

Display panels and display devices are provided. The display panel includes a substrate, a first wiring layer, a second wiring layer, an insulation layer, and a transfer layer. The second wiring layer includes a first connection part and a second connection part respectively disposed at edge portions on both sides of the first wiring layer. Second via holes are provided above the first connection part and the second connection part. First via hole are provided above the first wiring layer. The transfer layer connects the first wiring layer and the second wiring layer through the first via holes and the second via holes.