A resin multilayer substrate includes a first resin layer including a thermoplastic resin as a main material, a second resin layer including the thermoplastic resin as a main material and superposed on the first resin layer, a first interlayer-connection conductor passing through the first resin layer in a thickness direction, and a first conductor pattern at an area including a region in which the first interlayer-connection conductor is exposed at the surface of the first resin layer between the first resin layer and the second resin layer. The first conductor pattern includes a portion in or at which a portion of the first interlayer-connection conductor is disposed. The first conductor pattern includes a first portion covering the region exposed at the surface of the first resin layer; and a second portion disposed surrounding the first portion. The first portion and the second portion have different thicknesses from each other.

A component-embedded substrate includes first to sixth thermoplastic resin bases, a first electronic component in the second thermoplastic resin base and including a first terminal, and a second electronic component in the fifth thermoplastic resin base and including a second terminal. The first terminal faces the second electronic component in a stacking direction. The second terminal faces the first electronic component in the stacking direction. A first planar conductor to which the first terminal is directly bonded is provided on the third thermoplastic resin base. An interlayer connection conductor to which the second terminal is directly bonded and in communication with the first planar conductor is provided in or on the fourth thermoplastic resin base.

A microelectronic device comprises a first substrate (110) having a first electrically conductive path (111) therein and a second substrate (120) above the first substrate and having a second electrically conductive path (121) therein, wherein the first electrically conductive path and the second electrically conductive path are electrically connected to each other and form a portion of a current loop (131) of an inductor (130).

Sheets are laminated on each other and pressure bonded with fixtures from upper and lower directions of a lamination direction while being heated to produce a laminated circuit substrate including therein a capacitor and a coil. The capacitor is defined by a first conductor pattern and a second conductor pattern that face each other across thermoplastic resin layers. In the laminated circuit substrate, the first conductor pattern includes a first principal surface, the second conductor pattern includes a second principal surface, the first principal surface faces the second conductor pattern, the second principal surface faces the first conductor pattern, and the first principal surface and the second principal surface are subject to a roughening process.

A semiconductor substrate includes: (1) a first dielectric structure having a first surface and a second surface opposite the first surface; (2) a second dielectric structure having a third surface and a fourth surface opposite the third surface, wherein the fourth surface faces the first surface, the second dielectric structure defining a through hole extending from the third surface to the fourth surface, wherein a cavity is defined by the through hole and the first dielectric structure; (3) a first patterned conductive layer, disposed on the first surface of the first dielectric structure; and (4) a second patterned conductive layer, disposed on and contacting the second surface of the first dielectric structure and including at least one conductive trace, wherein the first dielectric structure defines at least one opening, and a periphery of the opening corresponds to a periphery of the through hole of the second dielectric structure.

A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. Two insulating layers are formed on the two metal layers. Two including upper and bottom conductive layers are formed on the two insulating layers. Then, the two insulating layers and the two conductive layers are laminated so that the two metal layers bonded to each other are embedded between the two insulating layers. A part of the two insulating layers and a part of the two conductive layers are removed to form a plurality of blind holes exposing the two metal layers. A conductive material is formed in the blind holes and on the remained two conductive layers. The sealed area of the two metal layers is separated to form two separated circuit substrates.

A composite device includes a substrate and a mounted component mounted on a surface of, or inside, the substrate. The substrate includes a first thermoplastic resin layer. A surface of the mounted component includes a second thermoplastic resin layer that includes a same or a similar material as that of the first thermoplastic resin layer. A bonding layer that bonds the second thermoplastic resin layer and the first thermoplastic resin layer together is provided between the second thermoplastic resin layer and the first thermoplastic resin layer.

A printed wiring board includes a laminate, a wiring layer formed on first main surface of the laminate and including conductor pads, via conductors including first and second via conductors and formed in the laminate such that each via conductor has diameter gradually reducing from the first main surface toward second main surface of the laminate, and conductor post formed on the first via conductors such that each conductor post includes a metal foil and a plating layer formed on the metal foil. The via conductors are formed such that the first via conductors are positioned in an outer edge portion of the laminate and have minimum-diameter-side surfaces positioned to form a same plane with the second main surface of the laminate and that the second via conductors are positioned in a central portion of the laminate and have minimum-diameter-side surfaces recessed from the second main surface of the laminate.

A method for manufacturing a wiring board includes preparing a core structure, forming on a first surface of the core structure a first buildup structure including insulation layers, and forming on a second surface of the core structure on the opposite side of the first surface of the core structure a second buildup structure including insulation layers and an inductor device. The insulation layers in the second buildup structure have thicknesses which are thinner than thicknesses of the insulation layers in the first buildup structure, and the forming of the second buildup structure includes forming the inductor device in the second buildup structure on the second surface of the core structure such that at least a portion of a conductive pattern formed in the core structure is included as a portion of the inductor device.

A semiconductor substrate includes: (1) a first dielectric structure having a first surface and a second surface opposite the first surface; (2) a second dielectric structure having a third surface and a fourth surface opposite the third surface, wherein the fourth surface faces the first surface, the second dielectric structure defining a through hole extending from the third surface to the fourth surface, wherein a cavity is defined by the through hole and the first dielectric structure; (3) a first patterned conductive layer, disposed on the first surface of the first dielectric structure; and (4) a second patterned conductive layer, disposed on and contacting the second surface of the first dielectric structure and including at least one conductive trace, wherein the first dielectric structure defines at least one opening, and a periphery of the opening corresponds to a periphery of the through hole of the second dielectric structure.