Implementations of semiconductor packages may include: one or more die electrically coupled to a lead frame. The lead frame may be included within a housing. The semiconductor package may also include a set of signal leads extending from the housing, a set of power leads extending from the housing, and a plurality of press fit pins each fixedly coupled to the set of signal leads and the set of power leads. The set of signal leads and the set of power leads may be configured to couple with a substrate.

Methods of and devices for coupling metal woven mesh or metal woven fabric with IC components to make flexible circuits are disclosed. The flexible circuits can be used to make wearable electronic devices, such as a garment with embedded IC chip.

An electronic component includes a capacitor array including a plurality of multilayer capacitors disposed in a vertical direction, among the multilayer capacitors, adjacent multilayer capacitors including opposing external electrodes, including band portions bonded to each other, the external electrodes being disposed in such a manner that a band portion disposed on a bonding surface has an area relatively larger than an area of a band portion disposed on a further surface, and a pair of metal frames, each including a vertical portion bonded to a head portion of an external electrode of a lowermost multilayer capacitor and a mounting portion bent at a lower end of the vertical portion to extend.

A multilayer ceramic electronic component includes a first metal terminal including a first terminal joining portion connected to a first end surface, a first extending portion connected to the first terminal joining portion and extending toward a mounting surface, and a first mounting portion connected to the first extending portion and extending in a length direction connecting the first end surface and a second end surface; a second metal terminal including a second terminal joining portion connected to the second end surface, a second extending portion extending from the second terminal joining portion toward the mounting surface, and a second mounting portion connected to the second extending portion and extending in a length direction connecting the first end surface and the second end surface. The first and second mounting portions include protrusions protruding toward the mounting surface.

A multilayer ceramic electronic component includes a first metal terminal including a first terminal joining portion connected to a first end surface, first and second extending portions extending from both ends of the first terminal joining portion toward a mounting surface, and first and second mounting portions connected respectively to the first and second extending portions in a length direction connecting the end surfaces to each other. A second metal terminal includes a second terminal joining portion connected to the second end surface, a third extending portion extending from the second terminal joining portion toward the mounting surface, and a third mounting portion connected to the third extending portion and extending in a length direction connecting the end surfaces to each other. The first and second mounting portions include first, second, and third protrusion bending portions protruding toward the mounting surface.

Implementations of semiconductor packages may include: one or more die electrically coupled to a lead frame. The lead frame may be included within a housing. The semiconductor package may also include a set of signal leads extending from the housing, a set of power leads extending from the housing, and a plurality of press fit pins each fixedly coupled to the set of signal leads and the set of power leads. The set of signal leads and the set of power leads may be configured to couple with a substrate.

An electronic component, a board having the same, and a method of manufacturing a metal frame for the electronic component. The electronic component includes a multilayer ceramic capacitor including a plurality of external electrodes formed on opposing surfaces of a capacitor body, respectively; and metal frames bonded to the external electrodes, respectively, wherein each of the metal frames includes an inner support portion, an outer support portion disposed on an outer surface of the inner support portion, and a connecting portion connecting portions of the inner support portion and the outer support portion to each other.

A power semiconductor device includes: a circuit body having a pair of conductor parts and a power semiconductor element sandwiched between the pair of conductor parts; a substrate in which a through hole is formed; and a sealing material that seals at least a part of each of the circuit body and the substrate, in which the circuit body is inserted into the through hole and has first and second exposed surfaces exposed from the sealing material, and the substrate has, in the through hole, a first protrusion and a second protrusion that protrude toward a center of the through hole and are connected to the circuit body, the first protrusion and the second protrusion being formed at positions opposed to each other in the through hole, and at least one of the first protrusion and the second protrusion being a terminal that transmits power to the power semiconductor element.

A semiconductor device package may include a substrate having an insulating layer with a patterned conductive layer formed thereon, the patterned conductive layer including at least a first pattern portion and a second pattern portion. The semiconductor device package may include a leadframe having a lead that is soldered to the substrate with solder provided in an opening between the first pattern portion and the second pattern portion and with the lead inserted into the opening.

A method of forming a circuit board assembly includes receiving a flat no-lead package. The package includes: a housing having a first side and second side; a circuit disposed within the housing; and an exposed thermal belly pad that is thermally coupled to the circuit and passes at least partially through the first side such that it can be exposed to an environment outside of the housing. The method also includes attaching the second side of the flat no-lead package to a first side of a printed circuit board (PCB) such that the exposed thermal belly pad is opposite the first side of the PCB.