Multiple thin film transistors are aligned in serial and parallel orientation. A second source region is disposed between a first source region and a first drain region. A second drain region is disposed between the first source region and the first drain region. The second drain region and the second source region substantially coincide. A first gate is disposed between the first source region and the coinciding second source and second drain regions. A second gate region is disposed between the first drain region and the coinciding second source and second drain regions. An semiconductor is disposed between the first source region, the first drain region, and the coinciding second source and second drain regions. A dielectric material is disposed between the semiconductor substrate and the first and second gates.

A transistor model that achieves precise approximation of transistor electrical characteristics is provided. The transistor model is a field-effect transistor model. A first capacitor is provided between a gate and a source. A second capacitor is provided between the gate and a drain. Each of the first capacitor and the second capacitor is a non-linear capacitor whose capacitance value is determined depending on a gate voltage. The first capacitor may be composed of a plurality of variable capacitors. The second capacitor may be composed of a plurality of variable capacitors. When CV characteristics of the first capacitor and CV characteristics of the second capacitor are adjusted, more precise simulation data is obtained.

A display device includes a driving transistor and an organic EL element. The driving transistor includes an oxide semiconductor layer; a first gate electrode that includes a region overlapping the oxide semiconductor layer; a first insulating layer between the first gate electrode and the oxide semiconductor layer; a second gate electrode that includes a region overlapping the oxide semiconductor layer and the first gate electrode; a second insulating layer between the second gate electrode and the oxide semiconductor layer; and a first and a second transparent conductive layer that are provided between the oxide semiconductor layer and the first insulating layer and each include a region contacting the oxide semiconductor layer. The organic EL element includes a first electrode; a second electrode; a light emitting layer between the first electrode and the second electrode; and an electron transfer layer between the light emitting layer and the first electrode.

An organic thin film transistor (OTFT), in particular thin-film field-effect transistor (OFET), that includes a substrate, a source electrode, a drain electrode, a gate electrode arranged in a top gate arrangement, and an organic semiconductor functional layer. The source electrode, the drain electrode, and the gate electrode are arranged in a coplanar layer structure. The organic thin-film transistor has an intermediate layer for the capacitive decoupling of the gate electrode from the source electrode and/or from the drain electrode.

A thin-film transistor (TFT), includes: a substrate (202); an organic semiconductor (OSC) layer (210) positioned on the substrate; a dielectric layer (214) positioned on the OSC layer; and a polymeric interlayer (212) disposed in-between the OSC layer and the dielectric layer, such that the dielectric layer is configured to exhibit a double layer capacitance effect. A method of forming a thin-film transistor, includes: providing a substrate; providing a bottom gate layer atop the substrate; disposing consecutively from the substrate, an organic semiconductor (OSC) layer, a dielectric layer, and a top gate layer; and patterning the OSC layer, the dielectric layer, and the top gate layer using a single mask.

A display device includes a driving transistor and an organic EL element. The driving transistor includes an oxide semiconductor layer; a first gate electrode that includes a region overlapping the oxide semiconductor layer; a first insulating layer between the first gate electrode and the oxide semiconductor layer; a second gate electrode that includes a region overlapping the oxide semiconductor layer and the first gate electrode; a second insulating layer between the second gate electrode and the oxide semiconductor layer; and a first and a second transparent conductive layer that are provided between the oxide semiconductor layer and the first insulating layer and each include a region contacting the oxide semiconductor layer. The organic EL element includes a first electrode; a second electrode; a light emitting layer between the first electrode and the second electrode; and an electron transfer layer between the light emitting layer and the first electrode.

Embodiments relate to a computing device that may be configured as a biomimetic audiomorphic device. The device can include a field effect transistor (FET) having a split-gate architecture with different spacing between the split-gates. Embodiments of the device can include multiple split-gates. Some embodiments include the integration of delay elements and tunable resistor-capacitance (RC) circuits for imitating the interaural time delay neurons. Some embodiments include global back-gating structural features to provide neuroplasticity aspects so as to provide adaptation related changes.

Provided is a semiconductor device having a dual gate field-effect transistor and a sensor in electrical communication with the transistor. The field-effect transistor can have a first gate electrode, a second gate electrode, a source electrode, a drain electrode, a semiconductor layer with parts in contact with the source and drain electrodes, a bi-layer gate insulator, and a second gate insulator. The bi-layer gate insulator can include a first layer and a second layer, the first layer located between the second layer and a first side of the semiconductor layer, the second layer located between the first layer and the first gate electrode. The second gate insulator can be located between the second gate electrode and a second side of the semiconductor layer, and the sensor can be in electrical communication with the second gate electrode.

A multiple-gate transistor is disclosed, comprising a source, a drain spaced apart from the source, a semiconductor region disposed between the source and the drain, and an insulating region disposed over the semiconductor region. The multiple-gate transistor further comprises a current control gate for controlling a magnitude of current flowing between the source and the drain through the semiconductor region in dependence on a first electric field applied to the current control gate, the current control gate being separated from the source by the semiconductor region and the insulating region, and a switching gate for permitting current to flow between the source and the drain through the semiconductor region in dependence on a second electric field applied to the switching gate. The conduction state of the transistor (i.e. on/off) can be controlled by varying the second electric field that is applied to the switching gate, whilst the magnitude of the current through the multiple-gate transistor can be set by varying the first electric field that is applied to the current control gate.

A thin film transistor, a manufacturing method of the same, and a CMOS inverter are provided. The thin film transistor includes a base substrate, a dielectric layer, and a semiconductor layer. A first channel is provided between the source and the drain. Carbon nanotubes are provided in the first channel. A second channel is provided between the drain and the gate. An ion gel is provided in the second channel. By regulating a composition of the ion gel and a content of a dopant, a threshold voltage of a carbon nanotube thin film transistor is effectively controlled.