A processing chamber system includes a substrate mounting module configured to secure a substrate within a first processing chamber. The system also includes a first deposition module configured to apply a light-sensitive film to a front side surface of the substrate, and a second deposition module configured to apply a film layer to a backside surface of the substrate. The front side surface is opposite to the backside surface of the substrate. A substrate has a bare backside surface with a first coefficient of friction. A film layer is formed onto the backside surface of the substrate. The film layer formed on the backside surface of the substrate has a second coefficient of friction. The second coefficient of friction is lower than the first coefficient of friction.

A first film (3) is formed on a front surface of a semiconductor wafer (1). A second film (4) is formed on the first film (3). A surface protection film (5) is formed to cover the first film (3) and second film (4). After forming the surface protection film (5), a reverse surface of the semiconductor wafer (1) is etched with a chemical liquid. The first film (3) is formed on an outer peripheral section of the semiconductor wafer (1). The second film (4) is not formed on the outer peripheral section of the semiconductor wafer (1). The first film (3) and the surface protection film (5) are adhered to each other in the outer peripheral section of the semiconductor wafer (1). The first film (3) has a higher adhesion to the surface protection film (5) than the second film (4).

Provided is a method for manufacturing a thin SiC wafer by which a SiC wafer is thinned using a method without generating crack or the like, the method in which polishing after adjusting the thickness of the SiC wafer can be omitted. The method for manufacturing the thin SiC wafer 40 includes a thinning step. In the thinning step, the thickness of the SiC wafer 40 can be decreased to 100 m or less by performing the Si vapor pressure etching in which the surface of the SiC wafer 40 is etched by heating the SiC wafer 40 after cutting out of an ingot 4 under Si vapor pressure.

A method of processing a wafer includes: a grinding step of grinding a back surface of the wafer to form, on the back side of the wafer, a recess corresponding to a device region and an annular projecting portion corresponding to a peripheral marginal region; and a splitting groove forming step of forming, after the grinding step is conducted, a splitting groove for splitting the device region and the peripheral marginal region from each other at the boundary between the recess and the annular projecting portion, the splitting groove extending from the front surface of the wafer to reach the back surface of the wafer. The splitting groove is formed by dry etching.

A semiconductor wafer has a base material with a first thickness and first and second surfaces. A wafer scribe mark is disposed on the first surface of the base material. A portion of an interior region of the second surface of the base material is removed to a second thickness less than the first thickness, while leaving an edge support ring of the base material of the first thickness and an asymmetric width around the semiconductor wafer. The second thickness of the base material is less than 75 micrometers. The wafer scribe mark is disposed within the edge support ring. The removed portion of the interior region of the second surface of the base material is vertically offset from the wafer scribe mark. A width of the edge support ring is wider to encompass the wafer scribe mark and narrower elsewhere around the semiconductor wafer.

A processing chamber system includes a substrate mounting module configured to secure a substrate within a first processing chamber. The system also includes a first deposition module configured to apply a light-sensitive film to a front side surface of the substrate, and a second deposition module configured to apply a film layer to a backside surface of the substrate. The front side surface is opposite to the backside surface of the substrate. A substrate has a bare backside surface with a first coefficient of friction. A film layer is formed onto the backside surface of the substrate. The film layer formed on the backside surface of the substrate has a second coefficient of friction. The second coefficient of friction is lower than the first coefficient of friction.

A donor substrate in a layer transfer process, is stabilized by attaching a backing substrate. The backing substrate allows thermal and mechanical stabilization during high-power implant processes. Upon cleaving the donor substrate to release a thin layer of material to a target, the backing substrate prevents uncontrolled release of internal stress leading to buckling/fracture of the donor substrate. The internal stress may accumulate in the donor substrate due to processes such as cleave region formation, bonding to the target, and/or the cleaving process itself, with uncontrolled bow and warp potentially precluding reclamation/reuse of the donor substrate in subsequent layer transfer processes. In certain embodiments the backing substrate may exhibit a Coefficient of Thermal Expansion (CTE) substantially matching, or complementary to, that of the donor substrate. In some embodiments the backing structure may include a feature such as a lip.

The present disclosure provides a semiconductor fabrication apparatus in accordance with one embodiment. The apparatus includes a wafer stage that is operable to secure and rotate a wafer; a polish head configured to polish a backside surface of the wafer; an air bearing module configured to apply an air pressure to a front surface of the wafer; and an edge sealing unit configured to seal edges of the wafer.

A processing method of a wafer includes a modified layer forming step of irradiating the wafer, from its back surface, with a laser beam of a wavelength having transmissivity for the wafer with its focal point positioned inside a boundary portion between an effective area and a chamfered portion, whereby a modified layer is formed along the chamfered portion, a chamfered portion removing step of applying an external force to an outer periphery of the wafer, and grinding the back surface of the wafer to a desired wafer thickness. The modified layer forming step includes a first step of forming a first modified layer relatively deep with cracks formed extending to the front surface, and a second step of forming a second modified layer relatively shallow, adjacent and on an outer or inner side of the first modified layer, with cracks formed not extending to the front surface.

An N-type double-sided solar cell preparation method comprises: sequentially forming a front aluminum oxide passivation layer and a front silicon nitride anti-reflection layer on a front face of an N-type silicon wafer. The front aluminum oxide passivation layer is prepared by using a plasma-enhanced atomic layer deposition method, and the deposition conditions thereof involve: any frequency in the frequency range of 40 kHz to 400 kHz is selected to be a radio-frequency power supply frequency, a gaseous aluminum source is first introduced into a plasma apparatus in a vacuum state, such that a layer of aluminum source molecules is adsorbed on the surface of the silicon wafer, and a gaseous oxygen source is then introduced, such that the oxygen source is ionized into plasma and reacts with the aluminum source to obtain aluminum oxide.