A semiconductor wafer can include a substrate, a poly template layer, and a semiconductor layer. The substrate has a central region and an edge region, the poly template layer is disposed along a peripheral edge of the substrate, and a semiconductor layer over the central region, wherein the semiconductor layer is monocrystalline. In an embodiment, the poly template layer and the monocrystalline layer are laterally spaced apart from each other by an intermediate region. In another embodiment, the semiconductor layer can include aluminum. A process of forming the substrate can include forming a patterned poly template layer within the edge region and forming a semiconductor layer over the primary surface. Another process of forming the substrate can include forming a semiconductor layer over the primary surface and removing a portion of the semiconductor layer so that the semiconductor layer is spaced apart from an edge of the substrate.

A wafer structure and a trimming method thereof are provided. The wafer structure includes a first wafer which includes a front surface, a back surface, and a sidewall connected to the front surface and the back surface. The sidewall of the first wafer includes a plurality of first regions at an edge of the sidewall and the back surface and laterally separated from one another by a pitch. Each of the first regions extends from the back surface toward the front surface and has etching streaks thereon.

Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a chamber providing a space in which a substrate is treated, a support unit supporting the substrate inside the chamber, a laser unit irradiating laser to an edge region of the substrate, a vision unit capturing the edge region of the substrate to measure an offset value of the substrate, and an adjustment unit adjusting an irradiation location of the laser based on the offset value of the substrate.

A wafer structure and a trimming method thereof are provided. The wafer structure includes a first wafer which includes a front surface, a back surface, and a sidewall connected to the front surface and the back surface. The sidewall of the first wafer includes a plurality of first regions at an edge of the sidewall and the back surface and laterally separated from one another by a pitch. Each of the first regions extends from the back surface toward the front surface and has etching streaks thereon.

A vacuum chuck includes: a vacuum chuck stage having a circular vacuum surface; a vacuum protection pad provided to the vacuum surface; an annular or arc-shaped concave portion dividing the vacuum surface into a central region located closer to a center of the vacuum surface and an outer circumferential region located on an outer circumferential side; and radially-extending concave portions formed in the central region. The vacuum protection pad has through holes in communication with the radially-extending concave portions, and the vacuum protection pad is bonded to the vacuum surface at the central region excluding the radially-extending concave portions.

A wafer is bonded to a support plate by cutting off, with a cutting blade, an annular portion of the bonded wafer which extends from the outer peripheral edge of the bonded wafer to a position that is spaced radially inwardly toward the center of the bonded wafer by a predetermined distance. Bonding is done by a method that includes a captured image forming step of irradiating the outer peripheral edge of the bonded wafer with light emitted from an irradiating unit and passing through a through hole, and imaging the outer peripheral edge of the bonded wafer with an imaging camera disposed in facing relation to the irradiating unit with the bonded wafer interposed therebetween, thereby to capture an image, and an outer peripheral edge position detecting step of detecting an outer peripheral edge position of the bonded wafer on the basis of the captured image.

The present description concerns a method of manufacturing a first wafer, intended to be assembled to a second wafer by molecular bonding, including the successive steps of: forming a stack of layers at the surface of a substrate; and successive chemical etchings of the edges of said layers from the layer of the stack most distant from the substrate, across a smaller and smaller width.

In order to reduce edge defects efficiently and sufficiently, a method for manufacturing a SiC epitaxial wafer according to the present invention is a method for manufacturing a SiC epitaxial wafer that forms a SiC epitaxial layer on top of a SiC single crystal substrate having an off angle, and includes a rough polishing step for subjecting an outer circumferential edge on a starting side of step-flow growth in the SiC single crystal substrate to rough polishing before forming the SiC epitaxial layer; and a final polishing step for further polishing for finish.

A wafer structure and a trimming method thereof are provided. The trimming method includes the following steps. A first wafer having a first surface and a second surface opposite to the first surface is provided. A first pre-trimming mark is formed on the first surface of the first wafer, where forming the first pre-trimming mark includes forming a plurality of recesses arranged as a path along a periphery of the first wafer. The first wafer is trimmed on the first pre-trimming mark and along the path of the first pre-trimming mark to remove a portion of the first wafer and form a trimmed edge having first regions thereon.

A substrate treating method may include jetting a fluid containing an abrasive onto a substrate, and polishing the substrate using the jetted fluid.