A polishing system for polishing a semiconductor wafer includes a wafer support for holding the semiconductor wafer, and a first polishing pad for polishing a region of the semiconductor wafer. The semiconductor wafer has a first diameter, and the first polishing pad has a second diameter shorter than the first diameter.

A processing method for a wafer having a chamfered portion at a peripheral edge includes a holding step of holding the wafer by a holding table, and a chamfer removing step of rotating the holding table while causing a first cutting blade to cut into the peripheral edge of the wafer while supplying a cutting liquid from a first cutting liquid supply nozzle to cut the peripheral edge of the wafer. In the chamfer removing step, a second cutting unit is positioned at a position adjacent to the first cutting unit at such a height that a second cutting blade does not make contact with the wafer and on the side of the center of the wafer as compared to the first cutting unit, and the cutting liquid is supplied from a second cutting liquid supply nozzle.

A system for electroless deposition on a substrate is provided, including the following: a chamber; a substrate support configured to receive a substrate having a conductive layer disposed on a top surface of the substrate, the top surface of the substrate having an edge exclusion region and a process region, wherein the substrate support is configured to rotate the substrate; a solution container configured to hold an electroless deposition solution; a dispenser configured to provide a flow of the electroless deposition solution; a controller, the controller configured to direct the flow of the electroless deposition solution toward the edge exclusion region while the substrate is rotated, the flow being directed away from the process region, the electroless deposition solution plates metallic material over the conductive layer at the edge exclusion region, to produce an increased thickness of the metallic material that reduces electrical resistance.

A silicon carbide single crystal substrate includes a first main surface, a second main surface, and a circumferential edge portion. The second main surface is opposite to the first main surface. The circumferential edge portion connects the first main surface and the second main surface. The circumferential edge portion has a linear orientation flat portion, a first arc portion having a first radius, and a second arc portion connecting the orientation flat portion and the first arc portion and having a second radius smaller than the first radius, when viewed along a direction perpendicular to the first main surface.

A method of processing a wafer having a first surface and a second surface opposite the first surface is provided. The method includes the steps of: holding the second surface of the wafer such that the first surface thereof is exposed; processing an exposed first surface side of an outer circumferential edge portion of the wafer with a processing tool including a grinding stone made of abrasive grains bound together by a bonding material, thereby forming on the outer circumferential edge portion a slanted surface that is inclined to the first surface so as to be progressively closer to the second surface in a direction from a central area of the wafer toward an outer circumferential edge thereof; and coating the first surface of the wafer with a liquid material according to a spin coating process, thereby forming a resist film on the first surface of the wafer.

An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a device substrate and a handle substrate. The device substrate has a first surface and a second surface opposite to each other, and a bevel disposed between the first and the second surfaces. The handle substrate is bonded to the second surface of the device substrate, wherein the oxygen content of the device substrate is less than the oxygen content of the handle substrate, and a bonding angle greater than 90° is between the bevel of the device substrate and the handle substrate.

Provided is an indium phosphide substrate which has suppressed sharpness of a wafer edge when polishing is carried out from the back surface of the wafer by a method such as back lapping. An indium phosphide substrate, wherein when planes A each parallel to a main surface are taken in a wafer, the phosphide substrate has an angle θ on the main surface side of 0°<θ≤110° for all of the planes A where a distance from the main surface is 100 μm or more and 200 μm or less, wherein the angle θ is formed by a plane B, the plane B including an intersection line of an wafer edge with each of the planes A and being tangent to the wafer edge, and an plane of each of the planes A extending in a wafer outside direction, and wherein in a cross section orthogonal to the wafer edge, the indium phosphide substrate has an edge round at least on the main surface side, and the edge round on the main surface side has a radius of curvature R.sub.f of from 200 to 350 μm.

Provided is an indium phosphide substrate having good accuracy of flatness of the orientation flat, and a method for producing the indium phosphide substrate. An indium phosphide substrate having a main surface and an orientation flat, wherein a difference between maximum and minimum values of a maximum height Pz in each of four cross-sectional curves is less than or equal to 1.50/10000 of a length in a longitudinal direction of an orientation flat end face, wherein the four cross-sectional curves are set at intervals of one-fifth of a thickness of the substrate on a surface excluding a width portion of 3 mm inward from both ends of the orientation flat end face in the longitudinal direction of the orientation flat end face, and the maximum height Pz in each of the four cross-sectional curves is measured in accordance with JIS B 0601:2013.

Provided is an indium phosphide substrate having good linearity accuracy of a ridge line where the main surface is in contact with the orientation flat, and a method for producing the indium phosphide substrate. An indium phosphide substrate having a main surface and an orientation flat, wherein a maximum value of deviation is less than 1/1000 of a length of a ridge line where the main surface is in contact with the orientation flat, when a plurality of measurement points are set at intervals of 2 mm from a start point to an end point at the ridge line, except for a length portion of 3 mm inward from both ends of the ridge line, and based on a reference line which is a straight line connecting the start point and the end point, a distance of each measurement point from the reference line is defined as the deviation of each measurement point.

A method of using a polishing system includes securing a wafer to a support, wherein the wafer has a first diameter. The method further includes polishing the wafer using a first polishing pad rotating about a first axis, wherein the first polishing pad has a second diameter greater than the first diameter. The method further includes rotating the support about a second axis perpendicular to the first axis after polishing the wafer using the first polishing pad. The method further includes polishing the wafer using a second polishing pad after rotating the support, wherein the second polishing pad has a third diameter less than the first diameter. The method further includes releasing the wafer from the support following polishing the wafer using the second polishing pad.