A method for manufacturing a wafer product, including the steps of: chamfering a circumferential edge portion of a wafer; lapping or double-side grinding main surfaces thereof; etching; mirror-polishing the main surface; and mirror-polishing the chamfered portion. The chamfered portion has a cross-sectional shape including: a first inclined portion continuous from the first main surface; a first arc portion continuous from the first inclined portion and having a radius of curvature; a second inclined portion continuous from the second main surface; a second arc portion continuous from the second inclined portion and having a radius of curvature; and an end portion connecting the first arc portion to the second arc portion. This provides a method for manufacturing a wafer by which a variation in a chamfered cross-sectional shape in a circumferential direction caused by etching can be suppressed.

Methods and apparatus for far edge trimming are provided herein. For example, an apparatus includes an integrated tool for processing a silicon substrate, comprising a vacuum substrate transfer chamber, an edge trimming apparatus coupled to the vacuum substrate transfer chamber and comprising a high pulse frequency laser and substrate support, wherein at least one of the high pulse frequency laser or the substrate support are movable with respect to each other and configured to trim about 2 mm to about 5 mm from a peripheral edge of a substrate when disposed on the substrate support, and a plasma etching apparatus coupled to the vacuum substrate transfer chamber and configured to etch silicon.

The present invention provides an aluminum nitride wafer and a method for making the same. The method includes forming at least one alignment notch in or at least one flat alignment edge on a periphery of the aluminum nitride wafer. The alignment notch and the flat alignment edge can prevent the aluminum nitride wafer from being in a poor state during the semiconductor manufacturing process and makes it possible to position the aluminum nitride wafer precisely so that the fraction defective can be lowered. The aluminum nitride wafer of the present invention has advantages of effective insulation, efficient heat dissipation, and a high dielectric constant, and can be used in semiconductor manufacturing processes, electronic products, and semiconductor equipment.

A processing method of a wafer includes trimming the wafer along its outer peripheral edge while causing a cutting blade to cut from a front surface into a chamfered portion to a depth greater than a finish thickness, so that an annular stepped portion is formed in an outer peripheral surplus region. A protective member is bonded to a side of the front surface of the wafer, and the wafer is ground from its back surface to thin the wafer to a finish thickness. Between trimming and grinding, a laser beam is applied to the stepped portion, so that annular modified layers which are to be fractured under a pressing force to be applied by the grinding are formed in the stepped portion, whereby the fractured fragments of the stepped portion are subdivided.

A stacked wafer processing method for processing one wafer of a stacked wafer having at least two layers laminated, includes a sheet laying step of laying a thermocompression bonding sheet on an upper face of the one wafer, a thermocompression bonding step of thermocompression-bonding the thermocompression bonding sheet to an outer peripheral portion of the one wafer where a chamfered portion is formed, a modified layer forming step of irradiating the stacked wafer with a laser beam having a transmission wavelength to the thermocompression bonding sheet and the one wafer from the thermocompression bonding sheet side with a focal point of the laser beam positioned inside the outer peripheral portion of the one wafer, thereby continuously forming a modified layer inside the one wafer, and a chamfered portion removing step of expanding the thermocompression bonding sheet to break the chamfered portion, thereby removing the chamfered portion from the one wafer.

A method for manufacturing a semiconductor device includes chucking in which a semiconductor device wafer is attached to an upper surface of a chuck mechanism with its device surface down; and edge trimming performed after the chucking, wherein the edge trimming comprises: rotating the semiconductor device water horizontally by the chuck mechanism; rotating a rotating blade horizontally by a vertical spindle to which an ultrasonic wave is applied and trimming a circumferential side surface of the semiconductor device wafer by the rotating blade.

A peeling layer is formed by applying a laser beam only to a central region of a workpiece other than a peripheral region extending inward from the peripheral edge of the workpiece by a predetermined distance. In this case, the application of the laser beam does not form the peeling layer in the peripheral region of the workpiece, and the formation of an ablation trace on the outer peripheral surface of the workpiece is prevented. As a result, it is possible to reduce a probability of occurrence of chipping in the peripheral region of a wafer peeled off from the workpiece when the wafer is subjected to a post-process.

There is provided a technique that includes a first opening and a second opening which supply gases to a process chamber in which a substrate is arranged, and is configured such that: the first opening and the second opening are arranged in a direction parallel to a surface of the substrate, a gas supplied from the first opening is supplied toward a center of the substrate, a gas supplied from the second opening is supplied toward a peripheral edge of the substrate, and a direction of the gas supplied from the second opening forms a predetermined angle with respect to a direction of the gas supplied from the first opening.

A method for manufacturing an epitaxial wafer including the steps of: preparing a silicon-based substrate having a chamfered portion in a peripheral portion; forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and performing an epitaxial growth on the silicon-based substrate having the trench formed. This provides a method for manufacturing an epitaxial wafer by which a crack generated in a peripheral chamfered portion can be suppressed from extending towards the center.

A method of manufacturing an epitaxy substrate is provided. A handle substrate is provided. A beveling treatment is performed on an edge of a device substrate such that a bevel is formed at the edge of the device substrate, wherein a thickness of the device substrate is greater than 100 μm and less than 200 μm. An ion implantation process is performed on a first surface of the device substrate to form an implantation region within the first surface. A second surface of the device substrate is bonded to the handle substrate for forming the epitaxy substrate, wherein a bonding angle greater than 90° is provided between the bevel of the device substrate and the handle substrate, and a projection length of the bevel toward the handle substrate is between 600 μm and 800 μm.