Provided is a polishing composition that can achieve haze reduction and wettability enhancement of a polished surface of a silicon wafer. This polishing composition contains silica particles, a cellulose derivative, a basic compound, and water. Here, the silica particles have an average primary particle diameter of 30 nm or less and an average secondary particle diameter of 60 nm or less. The cellulose derivative has a weight average molecular weight of more than 120×10.sup.4.

Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a SORI value of 2.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.

Provided is a method that is for polishing a silicon wafer by a polishing device using a carrier holding the silicon wafer, and that can reduce wear on the carrier. In this polishing method, a polishing liquid used in the polishing device contains 0.1-5 mass %, in terms of the concentration of silica, silica particles comprising: silica particles (A) having an average primary particle size of 4-30 nm as measured by BET, and having an (X2/X1) ratio of 1.2-1.8, where X2 (nm) represents an average particle size along the major axis thereof as calculated from a perspective projection image obtained using an electron beam, and X1 (nm) represents the average primary particle size as measured by BET; and silica particles (B) having an average primary particle size of more than 30 nm but not more than 50 nm as measured by BET, and having a (X2/X1) ratio of 1.2-1.8, where X2 (nm) represents an average particle size along the major axis thereof as calculated from a perspective projection image obtained using an electron beam, and X1 (nm) represents the average primary particle size as measured by BET, wherein the mass ratio of the silica particles (A) to the silica particles (B) is 100:0 to 85:15.

Provided are a method for polishing a silicon substrate according to which PID can be reduced and a polishing composition set usable in the polishing method. The silicon substrate polishing method provided by this invention comprises a stock polishing step and a final polishing step. The stock polishing step comprises several stock polishing sub-steps carried out on one same platen. The several stock polishing sub-steps comprise a final stock polishing sub-step carried out while supplying a final stock polishing slurry P.sub.F to the silicon substrate. The total amount of the final stock polishing slurry P.sub.F supplied to the silicon substrate during the final stock polishing sub-step has a total weight of Cu and a total weight of Ni, at least one of which being 1 μg or less.

Provided is a polishing composition that can achieve wettability enhancement and haze reduction of a polished surface of a silicon wafer. The polishing composition for a silicon wafer contains an abrasive, a cellulose derivative, a surfactant, a basic compound, and water. Here, the cellulose derivative has a weight average molecular weight of more than 120×10.sup.4, and the surfactant has a molecular weight of less than 4000.

A method for polishing a wafer in order to correct a shape of a polished wafer subjected to polishing, by pressing the wafer to a polishing pad while continuously supplying a composition for polishing containing water to perform correction-polishing, the method including the steps of: measuring the shape of the polished wafer before performing the correction-polishing; determining, in accordance with the measured shape of the polished wafer, a kind and concentration of a surfactant to be contained in the composition for polishing; and performing the correction-polishing while supplying the composition for polishing adjusted on a basis of the determined kind and concentration of the surfactant. This provides a method and apparatus for polishing a wafer that make it possible to reduce, in the latter polishing step, a variation in the shape of the wafer that occurred in a preceding polishing step.

Provided is a polishing composition that allows yielding a smooth surface comparable with or more than a surface produced by an abrasive-free polishing composition, and can be preferably used under both condition of low pressure and high pressure, in polishing of a hardness material. The polishing composition is a polishing composition for polishing a material having a Vickers hardness of 1500 Hv or more. The polishing composition contains particles and an oxidant, and the content of the particles is less than 400 ppm.

A composition for chemical mechanical polishing and a polishing method allow a semiconductor substrate containing at least one of a polysilicon film and a silicon nitride film to be polished at a high speed, while being capable of reducing the incidence of surface defects in the polished surface. The composition for chemical mechanical polishing contains (A) abrasive grains having plural protrusions on their surfaces and (B) a liquid medium, wherein the absolute value of the zeta-potential of the component (A) in the composition for chemical mechanical polishing is 10 mV or more.

An indium phosphide substrate, a method of inspecting thereof and a method of producing thereof are provided, by which an epitaxial film grown on the substrate is rendered excellently uniform, thereby allowing improvement in PL characteristics and electrical characteristics of an epitaxial wafer formed using this epitaxial film. The indium phosphide substrate has a first main surface and a second main surface, a surface roughness Ra1 at a center position on the first main surface, and surface roughnesses Ra2, Ra3, Ra4, and Ra5 at four positions arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge. An average value m1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.5 nm or less, and a standard deviation σ1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.2 nm or less.

An embodiment comprises: a lower plate; an upper plate which is disposed on the lower plate and rotates; a carrier which receives a wafer and is disposed on the lower plate; and a sensor unit for irradiating light to the wafer received in the carrier, detecting light reflected by the wafer, and outputting detection data according to the detection result, wherein the sensor unit rotates together with the upper plate.