A composition for semiconductor processing comprises: polishing particles; a thiazolinone compound; and a solvent, wherein a logarithmic reduction factor of a microorganism in the composition, as calculated by Formula 1, is at least 4:

Logarithmic reduction factor=log(CFU.sub.0/CFU.sub.x)  Formula 1 where CFU.sub.0 is an initial concentration (CFU/mL) of the microorganism, CFU.sub.x is a concentration (CFU/mL) of the microorganism remaining after standing at room temperature for X days, and X is 1, 2, 3, 4, 5 or 6.

Provided is an indium phosphide substrate which has suppressed sharpness of a wafer edge when polishing is carried out from the back surface of the wafer by a method such as back lapping. An indium phosphide substrate, wherein when planes A each parallel to a main surface are taken in a wafer, the phosphide substrate has an angle θ on the main surface side of 0°<θ≤110° for all of the planes A where a distance from the main surface is 100 μm or more and 200 μm or less, wherein the angle θ is formed by a plane B, the plane B including an intersection line of an wafer edge with each of the planes A and being tangent to the wafer edge, and an plane of each of the planes A extending in a wafer outside direction, and wherein in a cross section orthogonal to the wafer edge, the indium phosphide substrate has an edge round at least on the main surface side, and the edge round on the main surface side has a radius of curvature R.sub.f of from 200 to 350 μm.

Provided is an indium phosphide substrate having good accuracy of flatness of the orientation flat, and a method for producing the indium phosphide substrate. An indium phosphide substrate having a main surface and an orientation flat, wherein a difference between maximum and minimum values of a maximum height Pz in each of four cross-sectional curves is less than or equal to 1.50/10000 of a length in a longitudinal direction of an orientation flat end face, wherein the four cross-sectional curves are set at intervals of one-fifth of a thickness of the substrate on a surface excluding a width portion of 3 mm inward from both ends of the orientation flat end face in the longitudinal direction of the orientation flat end face, and the maximum height Pz in each of the four cross-sectional curves is measured in accordance with JIS B 0601:2013.

Polishing slurries for polishing semiconductor substrates are disclosed. The polishing slurry may include first and second sets of colloidal silica particles with the second set having a silica content greater than the first set.

Provided is an indium phosphide substrate having good linearity accuracy of a ridge line where the main surface is in contact with the orientation flat, and a method for producing the indium phosphide substrate. An indium phosphide substrate having a main surface and an orientation flat, wherein a maximum value of deviation is less than 1/1000 of a length of a ridge line where the main surface is in contact with the orientation flat, when a plurality of measurement points are set at intervals of 2 mm from a start point to an end point at the ridge line, except for a length portion of 3 mm inward from both ends of the ridge line, and based on a reference line which is a straight line connecting the start point and the end point, a distance of each measurement point from the reference line is defined as the deviation of each measurement point.

The present invention provides means capable of achieving both a reduction in the number of defects and a reduction in haze in an object to be polished after polishing at a high level in a method of polishing the object to be polished containing a material having a silicon-silicon bond. The present invention relates to a method of polishing an object to be polished containing a material having a silicon-silicon bond, and the polishing method includes a final polishing step P.sub.f. In this polishing method, the final polishing step P.sub.f has a plurality of polishing sub-steps, the plurality of polishing sub-steps are continuously performed on the same polishing platen, a final polishing sub-step in the plurality of polishing sub-steps is a polishing sub-step P.sub.ff of polishing using a polishing composition S.sub.ff, a polishing sub-step provided before the polishing sub-step P.sub.ff in the plurality of polishing sub-steps is a polishing sub-step P.sub.fp of polishing using a polishing composition S.sub.fp, and the polishing composition S.sub.ff satisfies at least one of the following condition (A) or the following condition (B): condition (A): a value of a haze parameter of the polishing composition S.sub.ff obtained in a standard test 1 is smaller than a value of the haze parameter of the polishing composition S.sub.fp obtained in the standard test 1, and condition (B): the polishing composition S.sub.ff contains an abrasive A.sub.ff, a basic compound B.sub.ff, and hydroxyethyl cellulose.

Provided is a polishing composition having excellent capability of reducing haze on the surface of an object to be polished. The polishing composition provided by the present invention includes an abrasive, a basic compound, a water-soluble polymer, and water. The water-soluble polymer includes at least a water-soluble polymer P1 and a water-soluble polymer P2. Here, the water-soluble polymer P1 is an acetalized polyvinyl alcohol-based polymer, and the water-soluble polymer P2 is a water-soluble polymer other than the acetalized polyvinyl alcohol-based polymer.

A method of using a polishing system includes securing a wafer to a support, wherein the wafer has a first diameter. The method further includes polishing the wafer using a first polishing pad rotating about a first axis, wherein the first polishing pad has a second diameter greater than the first diameter. The method further includes rotating the support about a second axis perpendicular to the first axis after polishing the wafer using the first polishing pad. The method further includes polishing the wafer using a second polishing pad after rotating the support, wherein the second polishing pad has a third diameter less than the first diameter. The method further includes releasing the wafer from the support following polishing the wafer using the second polishing pad.

A method for manufacturing a wafer product, including the steps of: chamfering a circumferential edge portion of a wafer; lapping or double-side grinding main surfaces thereof; etching; mirror-polishing the main surface; and mirror-polishing the chamfered portion. The chamfered portion has a cross-sectional shape including: a first inclined portion continuous from the first main surface; a first arc portion continuous from the first inclined portion and having a radius of curvature; a second inclined portion continuous from the second main surface; a second arc portion continuous from the second inclined portion and having a radius of curvature; and an end portion connecting the first arc portion to the second arc portion. This provides a method for manufacturing a wafer by which a variation in a chamfered cross-sectional shape in a circumferential direction caused by etching can be suppressed.

A double-side polishing method including: disposing a wafer between a polishing pad attached to an upper surface of a lower turn table and a polishing pad attached to a lower surface of an upper turn table provided above the lower turn table; and polishing both sides of the wafer. An absolute value of a difference between a gap at inner circumferential portions of the two polishing pads and a gap at outer circumferential portions thereof is defined as a pad gap. The pad gap is larger when the both sides of the wafer are polished than when the two polishing pads are dressed. This provides a double-side polishing method that simultaneously achieves enhancement of quality level (processing precision) and extension of cloth life.