Patent classifications
H01L21/02123
SELECTIVE SILICON DEPOSITION
Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may include one or more patterned features separated by exposed regions of the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor. Forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor may be performed at a plasma power of less than or about 1,000 W. The methods may include depositing a silicon-containing material on the one or more patterned features along the substrate. The silicon-containing material may be deposited on the patterned features at a rate of at least 2:1 relative to deposition on the exposed regions of the substrate.
SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Described herein is a technique capable of improving the uniformity of the film formation among the substrates. According to the technique described herein, there is provided a configuration including: a reaction tube having a process chamber where a plurality of substrates are processed; a buffer chamber protruding outward from the reaction tube and configured to supply a process gas to the process chamber, the buffer chamber including: a first nozzle chamber where a first nozzle is provided; and a second nozzle chamber where a second nozzle is provided; an opening portion provided at a lower end of an inner wall of the reaction tube facing the buffer chamber; and a shielding portion provided at a communicating portion of the opening portion between the second nozzle chamber and the process chamber.
METHOD FOR FORMING FILM AND PROCESSING APPARATUS
A method for forming a film that includes forming a boron nitride film on a substrate, and forming a boron-containing silicon film on the boron nitride film.
Patterned Semiconductor Device and Method
Methods of patterning semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a first dielectric layer over a semiconductor substrate; forming a first hard mask layer over the first dielectric layer; etching the first hard mask layer to form a first opening exposing a top surface of the first dielectric layer; performing a plasma treatment process on the top surface of the first dielectric layer and a top surface of the first hard mask layer; after performing the plasma treatment process, selectively depositing a spacer on a side surface of the first hard mask layer, the top surface of the first dielectric layer and the top surface of the first hard mask layer being free from the spacer after selectively depositing the spacer; and etching the first dielectric layer using the spacer as a mask.
COMPOSITION FOR FORMING SILICON-CONTAINING RESIST UNDERLAYER FILM REMOVABLE BY WET PROCESS
The object of the present invention is to provide resist underlayer film-forming composition for forming resist underlayer film usable as hard mask and removable by wet etching process using chemical solution such as sulfuric acid/hydrogen peroxide. A resist underlayer film-forming composition for lithography comprises a component (A) and component (B), the component (A) includes a hydrolyzable silane, hydrolysis product thereof, or hydrolysis-condensation product thereof, the hydrolyzable silane includes hydrolyzable silane of Formula (1):R.sup.1.sub.aR.sup.2.sub.bSi(R.sup.3).sub.4−(a+b) (where R.sup.1 is organic group of Formula (2):
##STR00001##
and is bonded to silicon atom through a Si—C bond; R.sup.3 is an alkoxy group, acyloxy group, or halogen group; is an integer of 1; b is an integer of 0 to 2; and a+b is an integer of 1 to 3), and the component (B) is cross-linkable compound having ring structure having alkoxymethyl group or hydroxymethyl group, cross-linkable compound having epoxy group or blocked isocyanate group.
COMPOSITE SUBSTRATE AND PRODUCTION METHOD THEREFOR
Provided are a composite substrate in which a wafer to be bonded has a sufficiently small surface roughness and which can be prevented from causing film peeling, and a method for producing the composite substrate. The composite substrate 40 of the present invention has a silicon wafer 10, an interlayer 11, and a single-crystal silicon thin film or oxide single-crystal thin film 20a stacked in the order listed and has a damaged layer 12a in a portion of the silicon wafer 10 on the side of the interlayer 11.
METHOD FOR ACTIVATING AN EXPOSED LAYER
A method for activating an exposed layer of a structure including a provision of a structure including an exposed layer, a deposition of a layer based on a material of formula Si.sub.aY.sub.bX.sub.c, with X chosen from among fluorine F and chlorine Cl, and Y chosen from among oxygen O and nitrogen N, a, b and c being non-zero positive integers, a treatment of the layer Si.sub.aY.sub.bX.sub.c by an activation plasma based on at least one from among oxygen and nitrogen, the parameters of the deposition of the layer Si.sub.aY.sub.bX.sub.c being chosen so as to obtain a sufficiently low material density such that the layer Si.sub.aY.sub.bX.sub.c is at least partially consumed by the activation plasma.
SINGLE OR MUTLI BLOCK MASK MANAGEMENT FOR SPACER HEIGHT AND DEFECT REDUCTION FOR BEOL
Aspects of the disclosure include method of making semiconductor structures. Aspects include providing a semiconductor structure including a plurality of spacer, an organic planarization layer, and a SiARC layer. Aspects also include forming an inverted mask on the semiconductor structure, the inverted mask including an inverted mask opening above a portion of the plurality of spacers and a portion of the TiN layer. Aspects also include eroding the portion of the plurality of spacers below the inverted mask opening. Aspects also include depositing a fill material masking the portion of the plurality of spacers below the inverted mask opening and the portion of the TiN layer below the inverted mask opening to generate a masked TiN layer segment and an unmasked TiN layer segment and removing a portion of the unmasked TiN layer segment.
CHEMISTRIES FOR ETCHING MULTI-STACKED LAYERS
Methods for fabricating a 3D NAND flash memory are disclosed. The method includes the steps of forming a hardmask pattern on the hardmask layer, and using the hardmask pattern to form apertures in the alternating layers by selectively plasma etching the alternating layers versus the hardmask layer using a hydrofluorocarbon etching gas selected from the group consisting of 1,1,1,3,3,3-hexafluoropropane (C.sub.3H.sub.2F.sub.6), 1,1,2,2,3,3-hexafluoropropane (iso-C.sub.3H.sub.2F.sub.6), 1,1,1,2,3,3,3-heptafluoropropane (C.sub.3HF.sub.7), and 1,1,1,2,2,3,3-heptafluoropropane (iso-C.sub.3HF.sub.7), wherein the first etching layer comprises a material different from that of the second etching layer.
MATERIALS AND SPIN COATING METHODS SUITABLE FOR ADVANCED PLANARIZATION APPLICATIONS
A composition is provided including a resin including one or more silicon-based materials, one or more organic-based materials, or a combination of silicon-based materials and organic-based materials. The composition further includes a first solvent having a boiling point from 140° C. to 250° C. and a second solvent having a boiling point from 50° C. to 110° C., wherein the a weight ratio of the first solvent to the second solvent is from 1:1 to 1:5. Methods for applying coatings to substrates are also provided.