Patent classifications
H01L21/0223
METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM
There is provided a technique that includes forming a film containing a predetermined element, oxygen, and nitrogen on the substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a first precursor containing the predetermined element to the substrate; (b) supplying a second precursor having a molecular structure different from a molecular structure of the first precursor and containing the predetermined element and oxygen; (c) supplying an oxidizing agent to the substrate; and (d) supplying a nitriding agent to the substrate.
Method for forming semiconductor structure with high aspect ratio
A semiconductor structure and a method for forming the same are provided. The method includes forming a first protruding structure, a second protruding structure, and a third protruding structure over a substrate. The method also includes performing a depositing process to form a first insulation material layer between the first protruding structure and the second protruding structure. The method further includes performing a first insulation material conversion process onto the first insulation material layer to bend the first protruding structure and the second protruding structure toward opposite directions.
SEMICONDUCTOR DEVICES HAVING FINS AND AN ISOLATION REGION
A semiconductor device and method includes: forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the second fin; forming a recess in the dummy gate material between the first fin and the second fin; forming a sacrificial oxide on sidewalls of the dummy gate material in the recess; filling an insulation material between the sacrificial oxide on the sidewalls of the dummy gate material in the recess; removing the dummy gate material and the sacrificial oxide; and forming a first replacement gate over the first fin and a second replacement gate over the second fin.
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor device includes: forming a mold structure including a mold layer and a supporter layer over a semiconductor substrate; forming an opening penetrating the mold structure; forming a protective layer on a bottom surface and a sidewall of the opening; forming a lower electrode over the protective layer; selectively etching the supporter layer to form a supporter that supports the lower electrode; removing the mold layer to define a non-exposed portion and an exposed portion of an outer wall of the protective layer; and selectively trimming the exposed portion of the protective layer to form a protective layer pattern between the supporter and the lower electrode.
SEMICONDUCTOR DEVICE HAVING FULLY OXIDIZED GATE OXIDE LAYER AND METHOD FOR MAKING THE SAME
A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.
METHOD AND SYSTEM FOR FORMING METAL-INSULATOR-METAL CAPACITORS
A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.
METHOD OF FORMING MEMORY DEVICE
Provided is a memory device including a substrate, a plurality of word-line structures, a plurality of cap structures, and a plurality of air gaps. The word-line structures are disposed on the substrate. The cap structures are respectively disposed on the word-line structures. A material of the cap structures includes a nitride. The nitride has a nitrogen concentration decreasing along a direction near to a corresponding word-line structure toward far away from the corresponding word-line structure. The air gaps are respectively disposed between the word-line structures. The air gaps are in direct contact with the word-line structures. A method of forming a memory device is also provided.
Cyclic spin-on coating process for forming dielectric material
The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.
Semiconductor device for increasing capacitance effective area and effective capacitance value
A semiconductor device is disclosed. The semiconductor device includes a substrate, a well, an oxidation layer, a gate electrode and a shared source/drain electrode. The substrate has a first surface and a second surface opposite to each other. The well is formed in the substrate. The substrate and the well have a first conductivity type and a second conductivity type respectively. The oxidation layer is formed in the well. The gate electrode is formed above the first surface and has a first opening. The shared source/drain electrode is formed near the first surface in the oxidation layer and exposed from the first opening. The shared source/drain electrode has the first conductivity type.
Method for making semiconductor device by adopting stress memorization technique
The application discloses a method of applying the stress memorization technique in making the semiconductor device which includes: step 1: forming a front gate structure on a silicon wafer having front and back surfaces; step 2: forming sidewalls including a first silicon nitride sidewall, a first silicon nitride layer corresponding to the first silicon nitride sidewall covering a first polysilicon layer on the wafer's back surface; step 3: growing a second silicon nitride layer on the wafer's front surface; step 4: etching the silicon nitride after stress transfer is completed, including: step 41: performing front single-wafer wet etching; step 42: performing batch wet etching to completely remove the second silicon nitride layer and reduces the thickness of the first silicon nitride layer on the back surface; step 5: completing the subsequent process. The application can improve the wafer flatness for improved photolithography for back-end-of-line processes and thereby increasing product yield.