A method of forming a semiconductor device comprises forming a fin structure; forming a source/drain structure in the fin structure; and forming a gate electrode over the fin structure. The source/drain structure includes Si.sub.1−x−yM1.sub.xM2.sub.y, where M1 includes Sn, M2 is one or more of P and As, 0.01≤x≤0.1, and 0.01≤y≤0.

A method for depositing a metal oxynitride film by epitaxial growth at a low temperature is provided. It is a method for manufacturing a metal oxynitride film, in which the metal oxynitride film is epitaxially grown on a single crystal substrate by a sputtering method using an oxide target with a gas containing a nitrogen gas introduced. The oxide target contains zinc, the substrate during the deposition of the metal oxynitride film is higher than or equal to 80° C. and lower than or equal to 400° C., and the flow rate of the nitrogen gas is greater than or equal to 50% and lower than or equal to 100% of the total flow rate of the gas.

A method includes forming a structure having a dummy gate stack over a fin protruding from a substrate. The fin includes an ML of alternating semiconductor layers and sacrificial layers. The method further includes forming a recess in an S/D region of the ML, forming a recess of the ML, and forming inner spacers on sidewalls of the sacrificial layers. Each inner spacer includes a first layer embedded in the sacrificial layer and a second layer over the first layer. The method further includes forming an S/D feature in the recess, such that the second layer of the inner spacers is embedded in the S/D feature. The method further includes removing the dummy gate stack to form a gate trench, removing the sacrificial layers from the ML, thereby forming openings interleaved between the semiconductor layers, and subsequently forming a high-k metal gate stack in the gate trench and the openings.

A CMOS image sensor and a method for forming the CMOS image sensor are provided. The method includes: forming a substrate structure and a photosensitive doped layer, wherein the substrate structure includes a plurality of pixel regions which are mutually discrete, and the photosensitive doped layer is disposed in a pixel region; and forming a switching device on the photosensitive doped layer. The switching device is formed on the photosensitive doped layer in a stacked manner. Therefore, an area of the pixel region can be reduced and a pixel density can be improved, and a size of the photosensitive region and a size of the reading circuit can be balanced, which is conducive to obtaining better photosensitive characteristics and switching performance.

A method includes forming a first fin-group having has a plurality of semiconductor fins, and a second fin-group. The plurality of semiconductor fins include a first semiconductor fin, which is farthest from the second fin-group among the first fin-group, a second semiconductor fin, and a third semiconductor fin, which is closest to the second fin-group among the first fin-group. The method further includes performing an epitaxy process to form an epitaxy region based on the plurality of semiconductor fins. The epitaxy region includes a first portion and a second portion. The first portion is in middle between the first semiconductor fin and the second semiconductor fin. The first portion has a first top surface. The second portion is in middle between the second semiconductor fin and the third semiconductor fin. The second portion has a second top surface lower than the first top surface.

A device includes a substrate, a pull-down transistor over the substrate, a pass-gate transistor over the substrate, and a pull-up transistor over the substrate. The pull-up transistor includes a first gate structure and first source/drain epitaxy structures on opposite sides of the first gate structure, in which each of the first source/drain epitaxy structures comprises a first epitaxy layer and a second epitaxy layer over the first epitaxy layer, wherein a germanium concentration of the first epitaxy layer is higher than a germanium concentration of the second epitaxy layer.

A method of fabricating a layered structure comprising growing an epitaxial layer on a substrate with a first resistivity proximal to the substrate and a second resistivity (less than the first) distal therefrom. Porosify the epitaxial layer to form a porous layer with porosity >30% proximal to the substrate and ≤25% distal from the substrate. Epitaxially grow a semiconductor (channel) layer over the porous layer. Also a layered structure comprising: a substrate; a porous layer; and an epitaxial semiconductor (channel) layer. The porous layer has a first porosity >30% proximal to the substrate and a second porosity ≤25% adjacent to the semiconductor layer. The two different porosities can be optimized. The higher porosity is effective at insulating the channel from the substrate. The lower porosity provides a crystalline structure with single crystal orientation exposed that supports the channel layer comprising high quality, low defect, epitaxial growth.

A method of performing HVPE heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and ternary-forming gasses (V/VI group precursor), to form a heteroepitaxial growth of a binary, ternary, and/or quaternary compound on the substrate; wherein the carrier gas is H.sub.2, wherein the first precursor gas is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the ternary-forming gasses comprise at least two or more of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide, or antimony tri-hydride, or stibine), H.sub.2S (hydrogen sulfide), NH.sub.3 (ammonia), and HF (hydrogen fluoride); flowing the carrier gas over the Group II/III element; exposing the substrate to the ternary-forming gasses in a predetermined ratio of first ternary-forming gas to second ternary-forming gas (1tf:2tf ratio); and changing the 1tf:2tf ratio over time.

Methods and associated devices including the fabrication of a semiconductor structure are described that include epitaxially growing a stack of layers alternating between a first composition and a second composition. The stack of layers extends across a first region and a second region of a semiconductor substrate. The stack of layers in the second region of the semiconductor substrate may be etched to form an opening. A passivation process is then performed that includes introducing chlorine to at least one surface of the opening. After performing the passivation process, an epitaxial liner layer is grown in the opening.

A method includes forming a first semiconductor fin over a p-well region of a substrate; forming a second semiconductor fin over an n-well region of a substrate; forming a gate structure crossing the first semiconductor fin and the second semiconductor fin; performing an implantation process to form a source/drain doped region in the first semiconductor fin; etching the second semiconductor fin to form a recess therein; performing a first epitaxy process to grow a first epitaxy layer in the recess; performing a second epitaxy process to grow a second epitaxy layer over the first epitaxy process; etching the second epitaxy layer to round a corner of the second epitaxy layer; forming an interlayer dielectric (ILD) layer covering the first semiconductor fin and the second epitaxy layer, wherein no etching is performed to the first semiconductor fin after forming the gate structure and prior to forming the ILD layer.