Patent classifications
H01L21/02304
Method for forming boron-based film, formation apparatus
A method of forming a boron-based film mainly containing boron on a substrate includes forming, on the substrate, an adhesion layer containing an element contained in a surface of the substrate and nitrogen, and subsequently, forming the boron-based film on the adhesion layer.
Structure body, sensor, and method for producing structure body
A structure body includes a base material and a siloxane based molecular membrane formed on the base material by use of an organic compound represented by Formula (1) or Formula (2): ##STR00001##
wherein any one of R1 to R5 is an amino group, others of R1 to R5 are each independently hydrogen or an alkyl group, R7 to R9 are each independently any one of hydroxy group, alkoxy group, alkyl group, and phenyl group on condition that one or more of R7 to R9 are each independently a hydroxy group or an alkoxy group, and R6 is an alkyl group.
INHERENTLY FERROELECTRIC HF-ZR CONTAINING FILMS
The disclosed and claimed subject matter relates to crystalline ferroelectric materials that include a mixture of hafnium oxide and zirconium oxide having a substantial (i.e., approximately 40% or more) or majority portion of the material in a ferroelectric phase as deposited (i.e., without the need for further processing, such as a subsequent capping or annealing) and methods for preparing and depositing these materials.
NON-PLASMA ENHANCED DEPOSITION FOR RECESS ETCH MATCHING
A NAND structure and method of fabricating the structure are described. A multi-layer ONON stack is deposited on a Si substrate and a field oxide grown thereon. A portion of the field oxide is removed, and high-aspect-ratio channels are etched in the stack. The channels are filled with a Si oxide using a thermal ALD process. The thermal ALD process includes multiple growth cycles followed by a passivation cycle. Each growth cycle includes treating the surface oxide surface using an inhibitor followed by multiple cycles to deposit the oxide on the treated surface using a precursor and source of the oxide. The passivation after the growth cycle removes the residual inhibitor. The Si oxide is recess etched using a wet chemical etch of DHF and then capped using a poly-Si cap.
TOPOLOGY-SELECTIVE NITRIDE DEPOSITION METHOD AND STRUCTURE FORMED USING SAME
A topology-selective deposition method is disclosed. An exemplary method includes providing an inhibition agent comprising a first nitrogen-containing gas, providing a deposition promotion agent comprising a second nitrogen-containing gas to form an activated surface on one or more of a top surface, a bottom surface, and a sidewall surface relative to one or more of the other of the top surface, the bottom surface, and the sidewall surface, and providing a precursor to react with the activated surface to thereby selectively form material comprising a nitride on the activated surface.
Method for forming a semiconductor structure
The present disclosure provides a method for forming a semiconductor structure. The method includes the following operations. A metal layer is formed. An adhesion-enhancing layer is formed over the metal layer by a silicide operation. A dielectric stack is formed over the adhesion-enhancing layer. A trench is formed in the dielectric stack by removing a portion of dielectric stack aligning with the metal layer. A barrier layer is formed conforming to the sidewall of the trench. A high-k dielectric layer is formed conforming to the barrier layer. A contact is formed in the trench and be connected to the metal layer.
Layer stack for display applications
Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer containing zirconium dioxide or hafnium dioxide disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.
Method of topology-selective film formation of silicon oxide
A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.
Semiconductor Structure and Method for Forming the Same
A semiconductor structure and a method of forming is provided. The semiconductor structure includes nanostructures separated from one another and stacked over a substrate, a gate stack wrapping around the nanostructures, and a dielectric fin structure laterally spaced apart from the nanostructures by the gate stack. The dielectric fin structure include a lining layer and a fill layer nested within the lining layer. The lining layer is made of a carbon-containing dielectric material, and a carbon concentration of the lining layer varies in a direction from the gate stack to the lining layer.
Semiconductor device with flowable layer
The present application discloses a semiconductor device with the flowable layer. The semiconductor device includes a substrate, a first isolation layer positioned in the substrate, a first treated flowable layer positioned between the first isolation layer and the substrate, a second isolation layer positioned in the substrate, and a second treated flowable layer positioned between the second isolation layer and the substrate. A width of the first isolation layer is greater than a width of the second isolation layer, and a depth of the first isolation layer is less than a depth of the second isolation layer.