There is provided a technique that includes (a) forming a first film on the substrate by supplying a film-forming agent to the substrate; (b) adding oxygen to the first film by supplying a first oxidizing agent to the substrate and oxidizing a part of the first film; and (c) changing the oxygen-added first film into a second film including an oxide film by supplying a second oxidizing agent to the substrate and oxidizing the oxygen-added first film.

Methods and precursors for depositing metal fluoride films on a substrate surface are described. The method includes exposing the substrate surface to a metal precursor and a fluoride precursor. The fluoride precursor is volatile at a temperature in a range of from 20° C. to 200° C. The metal precursor reacts with the fluoride precursor to form a non-volatile metal fluoride film.

Embodiments of the present disclosure generally relate to methods for gap fill deposition and film densification on microelectronic devices. The method includes forming an oxide layer containing silicon oxide and having an initial wet etch rate (WER) over features disposed on the substrate, and exposing the oxide layer to a first plasma treatment to produce a treated oxide layer. The first plasma treatment includes generating a first plasma by a first RF source and directing the first plasma to the oxide layer by a DC bias. The method also includes exposing the treated oxide layer to a second plasma treatment to produce a densified oxide layer. The second plasma treatment includes generating a second plasma by top and side RF sources and directing the second plasma to the treated oxide layer without a bias. The densified oxide layer has a final WER of less than one-half of the initial WER.

Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material.

A semiconductor device and a method of forming the same are provided. The method includes forming a trench in a substrate. A liner layer is formed along sidewalls and a bottom of the trench. A silicon-rich layer is formed over the liner layer. Forming the silicon-rich layer includes flowing a first silicon precursor into a process chamber for a first time interval, and flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second time interval. The second time interval is different from the first time interval. The method further includes forming a dielectric layer over the silicon-rich layer.

Methods and devices for forming a conductive line disposed over a substrate. A first dielectric layer is disposed over the substrate and coplanar with the conductive line. A second dielectric layer disposed over the conductive line and a third dielectric layer disposed over the first dielectric layer. A via extends through the second dielectric layer and is coupled to the conductive line. The second dielectric layer and the third dielectric layer are coplanar and the second and third dielectric layers have a different composition. In some embodiments, the second dielectric layer is selectively deposited on the conductive line.

Various aspects relate to a functional layer and the formation thereof. A method for manufacturing a functional layer of an electronic device may include: forming a plurality of sublayers of the functional layer by a plurality of consecutive sublayer processes, each sublayer process of the plurality of consecutive sublayer processes comprising: forming a sublayer of the plurality of sublayers by vapor deposition, the sublayer comprising one or more materials, and, subsequently, crystallizing the one or more materials comprised in the sublayer.

A semiconductor device manufacturing method of embodiments includes: forming a silicon oxide film on a surface of a silicon carbide layer; performing a first heat treatment in an atmosphere containing nitrogen gas at a temperature equal to or more than 1200° C. and equal to or less than 1600° C.; and performing a second heat treatment in an atmosphere containing nitrogen oxide gas at a temperature equal to or more than 750° C. and equal to or less than 1050° C.

Described herein is a technique capable of acquiring, monitoring and recording the progress of the reaction between a substrate and a reactive gas contained in a process gas in a process chamber during the processing of the substrate. According to the technique, there is provided a substrate processing apparatus including: a process chamber accommodating a substrate; a process gas supply system configured to supply a process gas into the process chamber via a process gas supply pipe; an exhaust pipe configured to exhaust an inner atmosphere of the process chamber; a first gas concentration sensor configured to detect a first concentration of a reactive gas contained in the process gas in the process gas supply pipe; and a second gas concentration sensor configured to detect a second concentration of the reactive gas contained in an exhaust gas in the exhaust pipe.

A semiconductor structure and a method of forming is provided. The semiconductor structure includes nanostructures separated from one another and stacked over a substrate, a gate stack wrapping around the nanostructures, and a dielectric fin structure laterally spaced apart from the nanostructures by the gate stack. The dielectric fin structure include a lining layer and a fill layer nested within the lining layer. The lining layer is made of a carbon-containing dielectric material, and a carbon concentration of the lining layer varies in a direction from the gate stack to the lining layer.