H01L21/02337

COMPOSITIONS AND METHODS USING SAME FOR DEPOSITION OF SILICON-CONTAINING FILMS
20170338109 · 2017-11-23 ·

Described herein are compositions and methods using same for forming a silicon-containing film or material such as without limitation a silicon oxide, silicon nitride, silicon oxynitride, a carbon-doped silicon nitride, or a carbon-doped silicon oxide film in a semiconductor deposition process, such as without limitation, a plasma enhanced atomic layer deposition of silicon-containing film.

Cyclic Spin-On Coating Process for Forming Dielectric Material
20220367180 · 2022-11-17 ·

The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.

Three dimensional NAND device containing fluorine doped layer and method of making thereof

A method of making a monolithic three dimensional NAND string comprising forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming an at least one front side opening in the stack and forming at least a portion of a memory film in the at least one front side opening. The method also includes forming a semiconductor channel in the at least one front side opening and doping at least one of the memory film and the semiconductor channel with fluorine in-situ during deposition or by annealing in a fluorine containing atmosphere.

METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE AND RELATED SEMICONDUCTOR STRUCTURES
20230170207 · 2023-06-01 ·

A method for filling a gap feature on a substrate surface is disclosed. The method may include: providing a substrate comprising a non-planar surface including one or more gap features; depositing a metal oxide film over a surface of the one or more gap features by a cyclical deposition process; contacting the metal oxide with an organic ligand vapor; and converting at least a portion of the metal oxide film to a porous material thereby filling the one or more gap features. Semiconductor structures including a metal-organic framework material formed by the methods of the disclosure are also disclosed.

FinFET structures and methods of forming the same

FinFET structures and methods of forming the same are disclosed. In a method, a recess is formed exposing a plurality of semiconductor fins on a wafer. A dummy contact material is formed in the recess. The dummy contact material contains carbon. The dummy contact material is cured with one or more baking steps. The one or more baking steps harden the dummy contact material. A first portion of the dummy contact material is replaced with an inter-layer dielectric. A second portion of the dummy contact material is replaced with a plurality of contacts. The plurality of contacts are electrically coupled to source/drain regions of the plurality of semiconductor fins.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES

In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a shield layer is formed over the first conductive layer forming a bilayer structure, a capping layer is formed over the shield layer, a first annealing operation is performed after the capping layer is formed, the capping layer is removed after the first annealing operation, and a gate electrode layer is formed after the capping layer is removed.

METHOD OF MAKING SEMICONDUCTOR FERROELECTRIC MEMORY ELEMENT, AND SEMICONDUCTOR FERROELECTRIC MEMORY TRANSISTOR

[Object] To provide a FeFET and a method of its manufacture, the FeFET having a ferroelectric whose film thickness (dr) is made small and so nanofine as to range in: 59 nm<dr<150, without impairing the data retention property of not less than 10.sup.5 seconds and the data rewrite withstand property of not less than 10.sup.8 times, of those that have hitherto been developed, and the FeFET allowing data to be written with a writing voltage whose absolute value is not more than 3.3 volts.

[Means for Solving] In methods of making a device in which an insulator, a film made of constituent elements of a bismuth layered perovskite crystalline ferroelectric and a metal are sequentially formed in the indicated order on a semiconductor substrate and thereafter are annealed for ferroelectric crystallization, thereby preparing the device composed of the semiconductor, insulator, ferroelectric and metal, a method of making a semiconductor ferroelectric memory element in which the film is composed of Ca. Sr, Bi, Ta and oxygen atoms, the metal is Ir or Pt or an alloy of Ir and Pt, or Ru, and the annealing for ferroelectric crystallization is performed in a mixed gas having oxygen added to nitrogen or a mixed gas having oxygen added to argon.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Provided is a semiconductor device having favorable reliability. A manufacturing method of a semiconductor device comprising the steps of: forming a first oxide semiconductor having an island shape; forming a first conductor and a second conductor over the first oxide semiconductor; forming an oxide semiconductor film over the first oxide semiconductor, the first conductor, and the second conductor; forming a first insulating film over the oxide semiconductor film; forming a conductive film over the first insulating film; removing part of the first insulating film and part of the conductive film to form a first insulator and a third conductor; forming a second insulating film covering the first insulator and the third conductor; removing part of the oxide semiconductor film and part of the second insulating film to form a second oxide semiconductor and a second insulator and to expose a side surface of the first oxide semiconductor; forming a third insulator in contact with the side surface of the first oxide semiconductor and with a side surface of the second oxide semiconductor; forming a fourth insulator in contact with the third insulator; and performing a microwave-excited plasma treatment to the third insulator and the fourth insulator.

Method for producing metal oxide film and method for producing transistor
09799510 · 2017-10-24 · ·

Provided is a technology for efficiently obtaining a metal oxide film having good adhesiveness. A method of producing a metal oxide film includes: an application step of applying a solution containing an organic metal complex onto a substrate; an ozone exposure step of exposing the resultant coating film to ozone; and a heating step of heating the coating film.

METAL RESISTORS HAVING VARYING RESISTIVITY
20170301745 · 2017-10-19 ·

A semiconductor structure is provided that includes a first metal resistor structure located on a portion of a dielectric-containing substrate. The first metal resistor structure includes, from bottom to top, a first nitridized dielectric surface layer portion having a first nitrogen content, a first metal portion, and a first dielectric capping layer portion. The semiconductor structure of the present application further includes a second metal resistor structure located on a second portion of the dielectric-containing substrate and spaced apart from the first metal resistor structure. The second metal resistor structure includes, from bottom to top, a second nitridized dielectric surface layer portion having a second nitrogen content that differs from the first nitrogen content, a second metal portion, and a second dielectric capping layer portion.