Patent classifications
H01L21/02337
Hot Jet Assisted Systems and Methods
A heating device for heating the surface of a substrate. The heating device comprises a gas source comprising an inert material supply inert under the operating conditions of the heating device, the gas source being adapted for supplying a hot jet of a gas comprising at least elements of said inert material on the substrate. The gas source is adapted for heating the hot jet of the gas to a temperature above 1500° C.
Method of forming gate dielectric layer for MOS transistor
A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitridation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.
SILICOUS FILM FORMING COMPOSITION COMPRISING BLOCK COPOLYMER AND METHOD FOR PRODUCING SILICEOUS FILM USING SAME
According to the present invention, a siliceous film forming composition, which is capable of filling trenches having narrow widths and high aspect ratios and forming a thick film, can be provided. A siliceous film forming composition comprising: (a) a block copolymer comprising a linear and/or cyclic block A having a polysilane skeleton comprising 5 or more silicon and a block B having a polysilazane skeleton comprising 20 or more silicon, and (b) a solvent.
Reducing K Values of Dielectric Films Through Anneal
A method includes performing an atomic layer deposition (ALD) process to form a dielectric layer on a wafer. The ALD process comprises an ALD cycle includes pulsing calypso ((SiCl.sub.3).sub.2CH.sub.2), purging the calypso, pulsing ammonia, and purging the ammonia. The method further includes performing a wet anneal process on the dielectric layer, and performing a dry anneal process on the dielectric layer.
METHODS FOR PRODUCING HIGH-DENSITY, NITROGEN-DOPED CARBON FILMS FOR HARDMASKS AND OTHER PATTERNING APPLICATIONS
Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide techniques for depositing nitrogen-doped diamond-like carbon films for patterning applications. In one or more embodiments, a method for processing a substrate includes flowing a deposition gas containing a hydrocarbon compound and a nitrogen dopant compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck, and generating a plasma at or above the substrate by applying a first RF bias to the electrostatic chuck to deposit a nitrogen-doped diamond-like carbon film on the substrate. The nitrogen-doped diamond-like carbon film has a density of greater than 1.5 g/cc and a compressive stress of about −20 MPa to less than −600 MPa.
Three-dimensional memory devices with enlarged joint critical dimension and methods for forming the same
Embodiments of three-dimensional (3D) memory devices with an enlarged joint critical dimension and methods for forming the same are disclosed. In an example, a 3D memory device is disclosed. The 3D memory device includes a substrate, a memory stack having a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the first memory stack and having a memory film along a sidewall of the memory string. The memory film includes a discontinuous blocking layer interposed by the dielectric layers.
METHOD FOR FORMING SILICON DIOXIDE FILM AND METHOD FOR FORMING METAL GATE
A method for forming a silicon dioxide film and a method for forming a metal gate are provided. The method for forming a silicon dioxide film includes: forming a silicon dioxide layer on a semiconductor substrate, performing a nitrogen treatment to the silicon dioxide layer to convert the silicon dioxide layer of partial thickness into a mixed layer of silicon nitride and silicon oxynitride; and removing the mixed layer to form a silicon dioxide film on the semiconductor substrate.
MODIFYING HYDROPHOBICITY OF A WAFER SURFACE USING AN ORGANOSILICON PRECURSOR
Methods and apparatuses for modifying a wafer surface using an organosilicon precursor are provided herein. The wafer surface is dosed with the organosilicon precursor following deposition of a dielectric material by an atomic layer deposition (ALD) process. In some implementations, the dielectric layer is made of silicon oxide. Dosing the wafer surface with the organosilicon precursor may occur in the same chamber as the ALD process. The organosilicon precursor may modify the wafer surface to increase its hydrophobicity so that photoresist adhesion is improved on the wafer surface. In some implementations, the wafer surface may be exposed to an inert gas RF plasma after dosing the wafer surface with the organosilicon precursor.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first oxide, an insulator over the first oxide, a first conductor over the insulator, a second conductor electrically connected to the first oxide, and a second oxide provided between the first oxide and the second conductor, and the contact area between the second oxide and the second conductor is larger than the contact area between the second oxide and the first oxide.
Semiconductor device structures with liners
Methods of forming semiconductor devices, memory cells, and arrays of memory cells include forming a liner on a conductive material and exposing the liner to a radical oxidation process to densify the liner. The densified liner may protect the conductive material from substantial degradation or damage during a subsequent patterning process. A semiconductor device structure, according to embodiments of the disclosure, includes features extending from a substrate and spaced by a trench exposing a portion of a substrate. A liner is disposed on sidewalls of a region of at least one conductive material in each feature. A semiconductor device, according to embodiments of the disclosure, includes memory cells, each comprising a control gate region and a capping region with substantially aligning sidewalls and a charge structure under the control gate region.