Patent classifications
H01L21/02356
Method of fabricating semiconductor device with reduced warpage and better trench filling performance
A trench is formed through a plurality of layers that are disposed over a first substrate. A first deposition process is performed to at least partially fill the trench with a first dielectric layer. The first dielectric layer delivers a tensile stress. A second deposition process is performed to form a second dielectric layer over the first dielectric layer. A third deposition process is performed to form a third dielectric layer over the second dielectric layer. The third dielectric layer delivers a first compressive stress.
AUXILIARY WAFER, PREPARATION METHOD OF AUXILIARY WAFER, AND SEMICONDUCTOR PRODUCTION PROCESS
Provided are an auxiliary wafer, a preparation method of the auxiliary wafer, and a semiconductor production process. The preparation method includes: providing an initial wafer; forming a protective film on a surface of the initial wafer, wherein a material of the protective film comprises aluminum oxide of a low-temperature phase; and carrying out an annealing process on the protective film to transform at least part of aluminum oxide from the low-temperature phase into a high-temperature phase to form a protective layer.
SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME
Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.
Semiconductor Device and Method of Manufacture
A nano-crystalline high-k film and methods of forming the same in a semiconductor device are disclosed herein. The nano-crystalline high-k film may be initially deposited as an amorphous matrix layer of dielectric material and self-contained nano-crystallite regions may be formed within and suspended in the amorphous matrix layer. As such, the amorphous matrix layer material separates the self-contained nano-crystallite regions from one another preventing grain boundaries from forming as leakage and/or oxidant paths within the dielectric layer. Dopants may be implanted in the dielectric material and crystal phase of the self-contained nano-crystallite regions maybe modified to change one or more of the permittivity of the high-k dielectric material and/or a ferroelectric property of the dielectric material.
DEPOSITION OF BORON FILMS
Methods for depositing boron-containing films on a substrate are described. The substrate is exposed to a boron precursor and a plasma to form the boron-containing film (e.g., elemental boron, boron oxide, boron carbide, boron silicide, boron nitride). The exposures can be sequential or simultaneous. The boron-containing films are selectively deposited on one material (e.g., SiN or Si) rather than on another material (e.g., silicon oxide).
FORMULATION FOR DEPOSITION OF SILICON DOPED HAFNIUM OXIDE AS FERROELECTRIC MATERIALS
In one aspect, the invention is formulations comprising both organoaminohafnium and organoaminosilane precursors that allows anchoring both silicon-containing fragments and hafnium-containing fragments onto a given surface having hydroxyl groups to deposit silicon doped hafnium oxide having a silicon doping level ranging from 0.5 to 8 mol %, preferably 2 to 6 mol %, most preferably 3 to 5 mol %, suitable as ferroelectric material. In another aspect, the invention is methods and systems for depositing the silicon doped hafnium oxide films using the formulations.
METHOD FOR PRODUCING FERROELECTRIC FILM, FERROELECTRIC FILM, AND USAGE THEREOF
Provided is a method for forming a ferroelectric film of a metal oxide having a fluorite-type structure at a low temperature of lower than 300° C., and a ferroelectric film obtained at a low temperature. The present invention provides a production method of a ferroelectric film comprising a crystalline metal oxide having a fluorite-type structure of an orthorhombic crystal phase, which comprises using a film sputtering method comprising sputtering a target at a substrate temperature of lower than 300° C., to deposit on the substrate a film of a metal oxide which is capable of having a fluorite-type structure of an orthorhombic crystal phase, and having a subsequent thermal history of said film of lower than 300° C.; or applying an electric field to said film after said deposition or after said thermal history of lower than 300° C. Also provided are the ferroelectric film, which is formed on an organic substrate, glass, or metal substrate, which can be used only at low temperatures, and a ferroelectric element and a ferroelectric functional element or device using the ferroelectric film.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR STRUCTURE
The present disclosure provides a semiconductor device and a method for fabricating a semiconductor device. The semiconductor device includes a substrate, a metal gate layer over the substrate, a channel between a source region and a drain region in the substrate, and a ferroelectric layer, at least a portion of the ferroelectric layer is between the metal gate layer and the substrate, wherein the ferroelectric layer includes hafnium oxide-based material, the hafnium oxide-based material includes a first portion of hafnium oxide with orthorhombic phase, a second portion of hafnium oxide with monoclinic phase, and a third portion of the hafnium oxide with tetragonal phase, wherein a first volume of the first portion is greater than a second volume of the second portion, and the second volume of the second portion is greater than a third volume the third portion.
Method for Fabricating a Semiconductor Device
A new method for fabricating a semiconductor device with high selection phosphoric acid solution and eliminating the step of oxide removal and thus reducing oxide loss to improve yield gain and cost saving.
Semiconductor Device and Method
A semiconductor device and method of manufacture are provided which utilizes metallic seeds to help crystallize a ferroelectric layer. In an embodiment a metal layer and a ferroelectric layer are formed adjacent to each other and then the metal layer is diffused into the ferroelectric layer. Once in place, a crystallization process is performed which utilizes the material of the metal layer as seed crystals.