Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.

A method for selectively modifying a base material surface, includes applying a composition on a surface of a base material to form a coating film. The coating film is heated. The base material includes a surface layer which includes a first region including a metal. The composition includes a first polymer and a solvent. The first polymer includes at an end of a main chain or a side chain thereof, a group including a first functional group capable of forming a bond with the metal. It is preferred that the base material further includes a second region comprising substantially only a non-metal, and the method further includes, after the heating, removing with a rinse agent a portion formed on the second region, of the coating film. The metal is preferably a constituent of a metal substance, an alloy, an oxide, an electrically conductive nitride or a silicide.

There is included (a) forming a protective film on a surface of a third base by supplying a processing gas to a substrate in which a first base containing no oxygen, a second base containing oxygen, and the third base containing no oxygen and no nitrogen are exposed on a surface of the substrate; (b) modifying a surface of the second base to be fluorine-terminated by supplying a fluorine-containing gas to the substrate after the protective film is formed on the surface of the third base; and (c) selectively forming a film on a surface of the first base by supplying a film-forming gas to the substrate after the surface of the second base is modified.

A method for forming a semiconductor device and a semiconductor device formed by the method are disclosed. In an embodiment, the method includes depositing a dummy dielectric layer on a fin extending from a substrate; depositing a dummy gate seed layer on the dummy dielectric layer; reflowing the dummy gate seed layer; etching the dummy gate seed layer; and selectively depositing a dummy gate material over the dummy gate seed layer, the dummy gate material and the dummy gate seed layer constituting a dummy gate.

The present disclosure provides a thin film transistor, a method for preparing the same, a display substrate, and a display device. The thin film transistor includes a gate electrode, a semiconductor layer, and a gate insulation layer arranged between the gate electrode and the semiconductor layer, and the gate insulation layer includes a metal oxide layer and a modified layer formed through self-assembling on a side of the metal oxide layer away from the gate electrode and.

The present inventive concept is related to methods for passivating an oxide layer and methods of selectively depositing a metal, metal nitride, metal oxide, or metal silicide layer on a metal, metal oxide, or silicide layer over an oxide layer including exposing the oxide layer to a passivant that selectively binds to the oxide layer over the metal, metal oxide, or silicide layer, and selectively growing the metal, metal nitride, metal oxide or metal silicide layer on the metal, metal oxide or silicide layer.

A semiconductor device structure is provided. The semiconductor device structure includes a fin structure formed over a semiconductor substrate and a gate structure formed across the fin structure. The semiconductor device structure also includes an isolation feature over a semiconductor substrate and below a portion of the gate structure and two spacer elements respectively formed over a first sidewall and a second sidewall of the gate structure. In addition, the first sidewall is opposite to the second sidewall and the two spacer elements have hydrophobic surfaces respectively facing the first sidewall and the second sidewall, and the gate structure includes a gate dielectric layer and a gate electrode layer separating the gate dielectric layer from the hydrophobic surfaces of the two spacer elements.

Methods and devices for forming a conductive line disposed over a substrate. A first dielectric layer is disposed over the substrate and coplanar with the conductive line. A second dielectric layer disposed over the conductive line and a third dielectric layer disposed over the first dielectric layer. A via extends through the second dielectric layer and is coupled to the conductive line. The second dielectric layer and the third dielectric layer are coplanar and the second and third dielectric layers have a different composition. In some embodiments, the second dielectric layer is selectively deposited on the conductive line.

The present invention relates to new aromatic-amino functional siloxanes, which are compounds comprising one or two tail groups X.sub.2, and a linking group L of structure (2) linking each said tail group to said head group, wherein the head group X has structure (1), containing an optional organic moiety Y, wherein the attachment point of said tail group X.sub.2 through said linking group L to the head group X.sub.1, may be, at positions a, b, c, d, or e. Another aspect of this invention are compositions containing these novel aromatic amino functional siloxane. A further aspect of this invention are compositions comprised of the above novel aromatic-amino functional siloxanes, and also the composition resulting from the aging of these compositions at room temperature for about 1 day to about 4 weeks. Still further aspects of this invention are processes for forming self-assembled monolayers on a substrate, from the aged composition, and also the processes of coating these aged compositions on patterned porous dielectrics to cap them also the processes of metallization of these capped pattered porous dielectrics.

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A method of forming a semiconductor device structure is provided. The method includes forming an isolation feature over a semiconductor substrate. The semiconductor substrate includes a fin structure over the isolation feature. Two opposing spacer elements are formed over the isolation feature and across the fin structure so as to define a gate opening. The gate opening exposes the fin structure and the isolation feature and inner sidewalls of the gate opening have carbon-containing hydrophobic surfaces. A gate structure is formed in the gate opening with the carbon-containing hydrophobic surfaces.