Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.

A method for preparing a device having a film on a substrate is disclosed. In the method, a film is deposited on a substrate. The film includes a single-crystalline or poly-crystalline semiconducting thin film. The single-crystalline or poly-crystalline semiconducting thin film is formed by sequential evaporation of a first and a second element. One example device prepared by the method includes a silicon substrate and a film on the substrate, wherein the film includes semiconducting and single- or poly-crystalline pyrite as the compound.

Ferromagnetic semiconductor layers and methods of forming the same are provided. Electronic devices including the ferromagnetic semiconductor layer are also provided. The ferromagnetic semiconductor layer may include an atomically thin transition metal dichalcogenide layer. The atomically thin transition metal dichalcogenide layer may include dopant metal atoms therein.

A template-assisted method for the synthesis of 2D nanosheets comprises growing a 2D material on the surface of a nanoparticle substrate that acts as a template for nanosheet growth. The 2D nanosheets may then be released from the template surface, e.g. via chemical intercalation and exfoliation, purified, and the templates may be reused.

The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS.sub.2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.

A template-assisted method for the synthesis of 2D nanosheets comprises growing a 2D material on the surface of a nanoparticle substrate that acts as a template for nanosheet growth. The 2D nanosheets may then be released from the template surface, e.g. via chemical intercalation and exfoliation, purified, and the templates may be reused.

A method for forming a Transition Metal Dichalcogenide (TMD)Group III-V semiconductor heterostructure comprises forming an insulating layer on an upper surface of a substrate, wherein the upper surface of the substrate is formed by a (111)-surface of a group IV semiconductor, forming a first aperture in the insulating layer, the aperture exposing a portion of the upper surface of the substrate, forming in a first epitaxial growth process, a semiconductor structure formed by a group III-V semiconductor comprising a pillar extending through the first aperture and a micro disc extending horizontally along a first portion of the upper surface of the insulating layer, and forming in a second epitaxial growth process, a TMD layer on an upper surface of the micro disc.

A memory cell pillar of a memory device includes a heating electrode having a base portion (leg) and a fin portion (ascender), and a selection device between a first conductive line and the heating electrode. A side surface of the selection device and a side surface of the fin portion extend along a first straight line. A method of fabricating a memory device includes forming a plurality of first insulating walls through a stack structure including a preliminary selection device layer and a preliminary electrode layer, forming a plurality of self-aligned preliminary heating electrode layers, forming a plurality of second insulating walls each between two of the plurality of first insulating walls, and forming a plurality of third insulating walls in a plurality of holes extending along a direction intersecting the plurality of first insulating walls.

Processes for fabricating multi- and monolayer silicene on catalyst metal surfaces by means of plasma-enhanced chemical vapor deposition (PECVD). Silicene is grown by means of PECVD from a starting mixture of H.sub.2 and SiH.sub.4 having an H.sub.2:SiH.sub.4 ratio of 100 to 400 on an Ag(111) substrate having a substrate temperature between 20 C. and 290 C., with the deposition being performed for about 10-25 minutes at an RF power between 10 W and 500 W and under a chamber pressure between about 100 mTorr and 1300 mTorr. In most cases, the substrate will be in the form of an Ag(111) film sputtered on a fused silica substrate. A multi-layer silicene film can be formed by extending the deposition time past 25 minutes.

A method for fabricating an electronic device including a semiconductor memory includes forming a chalcogenide layer, forming a first conductive layer on the chalcogenide layer, and increasing a density of an interface between the chalcogenide layer and the first conductive layer by injecting or irradiating ions onto the interface.