Patent classifications
H01L21/02425
GRAPHENE STRUCTURE AND METHOD OF FORMING THE GRAPHENE STRUCTURE
A graphene structure and a method of forming the graphene structure are provided. The graphene structure includes directly grown graphene that is directly grown on a surface of a substrate and has controlled surface energy.
Single crystal transition metal dichalcogenide thin film and method for synthesizing the same
Disclosed is a method for synthesizing a single crystal transition metal dichalcogenide thin film. The method includes processing a surface of a metal substrate such that a high index surface having a Miller index of (hkl) is exposed; and synthesizing a single crystal transition metal dichalcogenide on the high index surface using a chemical vapor deposition, wherein each of h, k, and l is independently an integer, and at least one of h, k, and l is an integer greater than or equal to +2 or smaller than or equal to 2.
Method for producing surface-modified component
A method for producing a surface-modified component includes: a process of forming a thermal sprayed coating on a substrate; a process of irradiating a surface of the thermal sprayed coating with a high energy beam so as to cause an entirety of the thermal sprayed coating and a part of the substrate in a thickness direction to melt and then solidify, and thereby forming a densified modified layer; a process of forming a thermal sprayed coating on the modified layer which has been formed in the latest; and a process of irradiating a surface of the thermal sprayed coating with a high energy beam so as to cause an entirety of the thermal sprayed coating and a part of the modified layer which has been formed in the latest in the thickness direction to melt and then solidify, and thereby forming a densified modified layer.
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device may include a substrate; a plurality of semiconductor pillars disposed over the substrate and arranged in a first direction and a second direction crossing the first direction; an insulating layer pattern disposed between the substrate and the semiconductor pillars and extending in the second direction; a first conductive line disposed between the insulating layer pattern and the semiconductor pillars and extending in the second direction; a second conductive line formed over sidewalls of the semiconductor pillars and extending in the first direction; and a storage node disposed over each of the semiconductor pillars.
Uniform multilayer graphene by chemical vapor deposition
A method of producing uniform multilayer graphene by chemical vapor deposition (CVD) is provided. The method is limited in size only by CVD reaction chamber size and is scalable to produce multilayer graphene films on a wafer scale that have the same number of layers of graphene throughout substantially the entire film. Uniform bilayer graphene may be produced using a method that does not require assembly of independently produced single layer graphene. The method includes a CVD process wherein a reaction gas is flowed in the chamber at a relatively low pressure compared to conventional processes and the temperature in the reaction chamber is thereafter decreased relatively slowly compared to conventional processes. One application for uniform multilayer graphene is transparent conductors. In processes that require multiple transfers of single layer graphene to achieve multilayer graphene structures, the disclosed method can reduce the number of process steps by at least half.
High Mobility Silicon on Flexible Substrates
A semiconductor device and method for fabricating same is disclosed. Embodiments are directed to a semiconductor device and fabrication of same which include a flexible substrate and a buffer stack overlying the substrate. The buffer stack comprises at least one epitaxial buffer layer. An epitaxial doped layer comprised predominantly of silicon overlies the at least one epitaxial buffer layer. Mobility of the device is greater than 100 cm.sup.2/Vs and carrier concentration of the epitaxial doped layer is less than 10.sup.16 cm.sup.3.
Semiconductor device and semiconductor device production system
A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
EPITAXIAL LIFT-OFF PROCESS OF GRAPHENE-BASED GALLIUM NITRIDE
The present invention discloses an epitaxial lift-off process of graphene-based gallium nitride (GaN), and principally solves the existing problems about complex lift-off technique, high cost, and poor quality of lift-off GaN films. The invention is achieved by: first, growing graphene on a well-polished copper foil by CVD method; then, transferring a plurality of layers of graphene onto a sapphire substrate; next, growing GaN epitaxial layer on the sapphire substrate with a plurality of graphene layers transferred by the metal organic chemical vapor deposition (MOCVD) method; finally, lifting off and transferring the GaN epitaxial layer onto a target substrate with a thermal release tape. With graphene, the present invention relieves the stress generated by the lattice mismatch between substrate and epitaxial layer; moreover, the present invention readily lifts off and transfers the epitaxial layer to the target substrate by means of weak Van der Waals forces between epitaxial layer and graphene.
PREPARATION OF AN ARRAY OF ULTRA-NARROW NANOWIRES ON FUNCTIONALIZED 2D MATERIALS AND USES THEREOF
The present invention generally relates to a method for preparing structurally unique nanomaterials and the products thereof. In particular, the present invention discloses a method for preparing an array of ultra-narrow nanowire or nanorod on a patterned monolayer supported by a 2D material substrate in a controlled environment, wherein said pattered monolayer comprises a polymerizable amphiphiles such as phospholipid with a terminal amine and wherein said controlled environment comprises a major nonpolar solvent, a trace amount of polar solvent, and a unsaturated aliphatic amine. Gold nanowires (AuNWs) so prepared have a highly controlled diameter of about 2 nm, a length up to about 1000 nm, and an AuNW ordering over an area >100 m.sup.2.
Method and apparatus for producing a nanometer thick film of black phosphorus
A low pressure process for producing thin film crystalline black phosphorus on a substrate and a black phosphorus thin film made by the process. The process includes flowing a phosphorus-containing gas into a deposition chamber and depositing phosphorus from the phosphorus-containing gas onto the substrate in the chamber. The substrate is selected from (i) a gold substrate, a gold-tin alloy substrate, a silver substrate and a copper substrate and (ii) a substrate comprising a thin film of metal selected from gold, tin, silver, copper and alloys of the foregoing metals. The substrate and phosphorus are heated to a temperature ranging from about 350 to less than about 500 C. to form a phosphorus intermediate composition. The substrate and intermediate composition are heated to a temperature of greater than 500 C. to less than about 1000 C. convert the metal phosphorus intermediate composition to the black phosphorus thin film.