Patent classifications
H01L21/02488
Method for manufacturing sample for thin film property measurement and analysis, and sample manufactured thereby
The present invention relates to a method for manufacturing a sample for thin film property measurement and analysis, and a sample manufactured thereby and, more specifically, to: a method for manufacturing a sample capable of measuring or analyzing various properties in one sample; and a sample manufactured thereby.
Polycrystalline ceramic substrate, bonding-layer-including polycrystalline ceramic substrate, and laminated substrate
Provided is a polycrystalline ceramic substrate to be bonded to a compound semiconductor substrate with a bonding layer interposed therebetween, wherein at least one of relational expression (1) 0.7<α.sub.1/α.sub.2<0.9 and relational expression (2) 0.7<α.sub.3/α.sub.4<0.9 holds, where α.sub.1 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 300° C. and α.sub.2 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 300° C., and α.sub.3 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 1000° C. and α.sub.4 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 1000° C.
Method of forming transition metal dichalcogenide thin film
Disclosed herein are a method of forming a transition metal dichalcogenide thin film and a method of manufacturing a device including the same. The method of forming a transition metal dichalcogenide thin film includes: providing a substrate in a reaction chamber; depositing a transition metal dichalcogenide thin film on the substrate using a sputtering process that uses a transition metal precursor and a chalcogen precursor and is performed at a first temperature; and injecting the chalcogen precursor in a gas state and heat-treating the transition metal dichalcogenide thin film at a second temperature that is higher than the first temperature. The substrate may include a sapphire substrate, a silicon oxide (SiO.sub.2) substrate, a nanocrystalline graphene substrate, or a molybdenum disulfide (MoS.sub.2) substrate.
Metal oxide (MO) semiconductor and thin-film transistor and application thereof
The present invention discloses a metal oxide (MO) semiconductor, which is implemented by respectively doping at least an oxide of rare earth element R and an oxide of rare earth element R′ into an indium-containing MO semiconductor to form an In.sub.xM.sub.yR.sub.nR′.sub.mO.sub.z semiconductor. According to the present invention, the extremely high oxygen bond breaking energy in the oxide of rare earth element R is used to effectively control the carrier concentration in the semiconductor, and a charge transportation center can be formed by using the characteristic that the radius of rare earth ions is equivalent to the radius of indium ions, so that the electrical stability of the semiconductor is improved. The present invention further provides a thin-film transistor based on the MO semiconductor and application thereof.
Oxide Semiconductor Sputtering Target And Method Of Fabricating Thin-Film Transistor Using Same
An oxide semiconductor sputtering target used in a sputtering process to deposit an active layer of a TFT. The oxide semiconductor sputtering target is formed from a material based on a composition of In, Sn, Ga, Zn, and O. The material contains gallium oxide, tin oxide, zinc oxide, and indium oxide. The In, Sn, Ga, and Zn contents are in ranges of 60% to 80%, 0.5% to 8%, 5% to 15%, and 10% to 30% by weight with respect to the weight of In+Sn+Ga+Zn, respectively. A method of fabricating a TFT includes depositing an active layer using the oxide semiconductor sputtering target. Such a TFT is used in a liquid crystal display (LCD), an organic light-emitting display, an electroluminescence display, and the like.
ELECTRONIC DEVICE INCLUDING HETEROGENEOUS SINGLECRYSTAL TRANSITION METAL OXIDE LAYER DISPOSED ON SUBSTRATE, AND METHOD FOR MANUFACTURING THE SAME
Provided is an electronic device including a semiconductor substrate, a single-crystal first transition metal oxide layer on the semiconductor substrate, and a single-crystal second transition metal oxide layer spaced apart from the semiconductor substrate with the single-crystal first transition metal oxide layer interposed therebetween. The first transition metal oxide layer and the second transition metal oxide layer are in contact with each other. The semiconductor substrate, the first transition metal oxide layer, and the second transition metal oxide layer include different materials from each other. The first transition metal oxide layer and the second transition metal oxide layer have the same crystal direction.
BILAYER METAL DICHALCOGENIDES, SYNTHESES THEREOF, AND USES THEREOF
The present disclosure generally relates to bilayer metal dichalcogenides, to processes for forming bilayer metal dichalcogenides, and to uses of bilayer metal dichalcogenides in devices for quantum electronics. In an aspect, a device is provided. The device includes a gate electrode, a substrate disposed over at least a portion of the gate electrode, and a bottom layer including a first metal dichalcogenide, the bottom layer disposed over at least a portion of the substrate. The device further includes a top layer including a second metal dichalcogenide, the top layer disposed over at least a portion of the bottom layer, the first metal dichalcogenide and the second metal dichalcogenide being the same or different. The device further includes a source electrode and a drain electrode disposed over at least a portion of the top layer.
Devices comprising crystalline materials and related systems
A method includes forming a semiconductor structure. The structure includes a first material, a blocking material, a second material in an amorphous form, and a third material in an amorphous form. The blocking material is disposed between the first material and the second material. At least the second material and the third material each comprise silicon and/or germanium. The structure is exposed to a temperature above a crystallization temperature of the third material and below a crystallization temperature of the second material. Semiconductor structures, memory devices, and systems are also disclosed.
Composition and method for making picocrystalline artificial borane atoms
Materials containing picocrystalline quantum dots that form artificial atoms are disclosed. The picocrystalline quantum dots (in the form of born icosahedra with a nearly-symmetrical nuclear configuration) can replace corner silicon atoms in a structure that demonstrates both short range and long-range order as determined by x-ray diffraction of actual samples. A novel class of boron-rich compositions that self-assemble from boron, silicon, hydrogen and, optionally, oxygen is also disclosed. The preferred stoichiometric range for the compositions is (B.sub.12H.sub.w).sub.xSi.sub.yO.sub.z with 3≤w≤5, 2≤x≤4, 2≤y≤5 and 0≤z≤3. By varying oxygen content and the presence or absence of a significant impurity such as gold, unique electrical devices can be constructed that improve upon and are compatible with current semiconductor technology.
Ingan epitaxy layer and preparation method thereof
Provided are a method for preparing an InGaN-based epitaxial layer on a Si substrate (12), as well as a silicon-based InGaN epitaxial layer prepared by the method. The method may include the steps of: 1) directly growing a first InGaN-based layer (11) on a Si substrate (12); and 2) growing a second InGaN-based layer on the first InGaN-based layer (11).