In a semiconductor manufacturing method, a mask is disposed on a semiconductor layer or semiconductor substrate. The semiconductor layer or semiconductor substrate is etched in an area delineated by the mask to form a cavity. With the mask disposed on the semiconductor layer or semiconductor substrate, the cavity is lined to form a containment structure. With the mask disposed on the semiconductor layer or semiconductor substrate, the containment structure is filled with a base semiconductor material. After filling the containment structure with the base semiconductor material, the mask is removed. At least one semiconductor device is fabricated in and/or on the base semiconductor material deposited in the containment structure.

A method of producing a polycrystalline silicon TFT includes forming nickel patterns on a substrate, forming a phosphorus doped silicon layer over the substrate and nickel patterns, and forming an intrinsic silicon layer on the phosphorus doped silicon layer. Alternatively, the intrinsic silicon layer can be formed on the substrate, the phosphorus doped silicon layer on the intrinsic silicon layer, and the nickel patterns on the phosphorus doped silicon layer. The structure is annealed to crystallize the phosphorus doped silicon and intrinsic silicon layers. A method of forming a crystalline silicon layer of a TFT device includes forming a first silicon film, forming a phosphorus doped silicon film on the first silicon film, forming a nickel film on the phosphorus doped silicon film, and annealing the structure to crystallize the phosphorus doped silicon and first silicon films. The first silicon and phosphorous doped silicon films are amorphous at formation.

A method of manufacturing a semiconductor device, includes forming an aluminum compound film on a surface of a process chamber by supplying an aluminum (Al) source to the process chamber, the surface contacting the aluminum source in the process chamber; disposing a wafer on a susceptor provided in the process chamber after forming the aluminum compound film; and forming a thin film for the semiconductor device on the wafer.

A single crystal semiconductor includes a strain compensation layer; an amorphous substrate disposed on the strain compensation layer; a lattice matching layer disposed on the amorphous substrate and including two or more single crystal layers; and a single crystal semiconductor layer disposed on the lattice matching layer, the lattice matching layer including a direction control film disposed on the amorphous substrate and including a single crystal structure, and a buffer layer including a material different from that of the direction control film, the buffer layer being disposed on the direction control film and including a single crystal structure.

A method of producing a reduced-defect density crystalline silicon film includes forming a Six1Ge1-x1 film on a substrate, forming a Six2Ge1-x2 film on the Six1Ge1-x1 film, forming a silicon film on the Six2Ge1-x2 film, and annealing to crystallize the Six1Ge1-x1, Six2Ge1-x2, and silicon films. The values of x1 and x2 are between zero and one. The Six1Ge1-x1 and Six2Ge1-x2 films are amorphous at formation, having a first thermal budget and a second thermal budget, respectively, for crystallization, the second thermal budget lower than the first thermal budget, the Six2Ge1-x2 film spaced apart from the substrate by the Six1Ge1-x1 film. A crystalline silicon TFT device includes a substrate, a crystallized Six1Ge1-x1 layer on the substrate, a crystallized Six2Ge1-x2 layer on the crystallized Six1Ge1-x1 layer, a crystallized silicon layer on the Six2Ge1-x2 layer, a gate insulator layer on the crystallized silicon layer, and a gate electrode on the gate insulator layer.